Analog Devices Inc. ADP5061ACBZ-2-R7

Overview

ADP5061ACBZ-2-R7 from Analog Devices is a tiny, I²C-programmable linear battery charger with integrated power path management and USB Battery Charging Specification 1.2 compliance. It delivers up to 2.1 A in LDO mode, operates from 4.0 V to 6.7 V input, tolerates −0.5 V to +20 V on VBUS, and features a 30 mΩ battery isolation FET - enabling system power-up even with a dead battery. It targets portable Li-ion devices requiring robust USB-compatible charging and thermal-safe operation.

For engineers reviewing the ADP5061ACBZ-2-R7 datasheet, ADP5061ACBZ-2-R7 pinout, ADP5061ACBZ-2-R7 application, or ADP5061ACBZ-2-R7 equivalent, this page provides verified technical context, JEITA-compliant temperature-aware charging behavior, factory-programmable DIG_IO logic mapping, real-world I²C register defaults, and validated alternative parts for single-cell Li-ion portable systems.

Technical Context

The ADP5061ACBZ-2-R7 implements a dual-path architecture: one path supplies regulated system voltage (VISO_S) via an internal high-voltage blocking FET (R_DS(ON) = 330–485 mΩ), while the other routes charge current through a low-R_DS(ON) (30–49 mΩ) battery isolation FET. Its I²C interface supports full configuration of charge current (715–775 mA typical CC mode), termination voltage (4.200 V ±0.25% at 25°C), and JEITA1/2 thermal profiles.

DIG_IO2 and DIG_IO3 are factory-configured for this variant: DIG_IO2 disables IC1 (LDO + charger) when high, reducing VINx quiescent current to 280 µA; DIG_IO3 enables charging only when driven high. The device uses a 2.7–3.3 MHz internal oscillator and supports USB 3.0-compliant current limits (100 mA, 500 mA, 900 mA, 1.5 A) based on external USB detection chip input.

Key Specifications

Pinout & Package

ADP5061ACBZ-2-R7 is housed in a 20-ball, 2.6 mm × 2.0 mm, 0.5 mm pitch WLCSP package (ball-side-down orientation). Thermal resistance θ_JA = 46.8°C/W on JEDEC 2S2P 4-layer board.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar linear battery charger applications.

Compared with BQ24075RGTR and MAX1555, the ADP5061ACBZ-2-R7 uniquely integrates JEITA1 thermal profiling, 30 mΩ power path FET for dead-battery operation, and I²C programmability - making it the only option among the three that satisfies USB BC 1.2 compliance and medical-grade thermal safety in a 2.6 mm × 2.0 mm footprint.

Availability

ADP5061ACBZ-2-R7 is available at Aetrix Electronics and suitable for digital still cameras, portable medical devices, and mobile phones requiring stable component supply, JEITA-compliant charging, and compact power-path integration.

Supply support for ADP5061ACBZ-2-R7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and consumer markets.

The ADP5061 product line delivers highly integrated, USB-compliant linear battery chargers with power path management - designed specifically for space-constrained portable Li-ion devices needing robust thermal safety and hardware-enforced charge control.

FAQ

What is the primary function of the ADP5061ACBZ-2-R7?

The ADP5061ACBZ-2-R7 is a fully integrated linear battery charger with power path management. It simultaneously supplies regulated system voltage (up to 2.1 A) and charges a single-cell Li-ion battery, while enforcing JEITA1 thermal safety limits and USB Battery Charging Specification 1.2 compliance. Its 30 mΩ battery isolation FET enables system power-up even with a dead battery - a core capability confirmed in the datasheet's General Description and Pin Function Descriptions sections.

How does the ADP5061ACBZ-2-R7 handle USB input current limiting?

The ADP5061ACBZ-2-R7 supports multiple USB-compliant input current limits: 100 mA (nominal USB initialized), 500 mA (USB super speed), 900 mA (USB enumerated), and 1.5 A (dedicated wall charger). These are selected via external USB detection chip input and DIG_IO1 pin state, as documented in Table 1 (General Parameters) and Pin Function Descriptions. The device tolerates up to +20 V on VBUS, eliminating need for external overvoltage protection during USB connect/disconnect transients.

What JEITA profile is enabled by default on the ADP5061ACBZ-2-R7?

The ADP5061ACBZ-2-R7 ships with JEITA1 Li-ion battery charging specification enabled by default, as explicitly stated in Tables 4 and 5 (JEITA1 Li-ION BATTERY CHARGING SPECIFICATION DEFAULTS) of the Rev. D datasheet. This includes cold (0°C), cool (10°C), typical (25°C), warm (45°C), and hot (60°C) thresholds with corresponding resistance thresholds and charge voltage reductions - all configurable via I²C if JEITA2 or custom profiles are needed.

What is the role of DIG_IO2 and DIG_IO3 on the ADP5061ACBZ-2-R7?

Per Pin Function Descriptions (Table 6), DIG_IO2 disables the LDO and charger when driven high (reducing VINx current to 280 µA), while DIG_IO3 enables charging only when driven high - both are factory-programmed for the ADP5061ACBZ-2-R7 variant. These pins provide hardware-level safety interlocks independent of I²C configuration, and their behavior dominates initial startup until overridden by I²C register writes, as noted in the footnote to Table 6.

What package type and dimensions does the ADP5061ACBZ-2-R7 use?

The ADP5061ACBZ-2-R7 uses a 20-ball, 2.6 mm × 2.0 mm, 0.5 mm pitch Wafer-Level Chip Scale Package (WLCSP), as specified in the Pin Configuration diagram (Figure 3) and Packaging and Ordering Information section (Page 42). Thermal resistance is θ_JA = 46.8°C/W on a JEDEC 2S2P 4-layer board - a critical parameter for thermal design in compact portable enclosures.