Analog Devices Inc. ADP5061ACBZ-5-R7

Overview

ADP5061ACBZ-5-R7 from Analog Devices is a tiny, I²C-programmable linear battery charger with power path management and USB 3.0/BC 1.2 compliance. It delivers up to 2.1 A in LDO mode, features a 30 mΩ battery isolation FET, supports JEITA-compliant temperature-aware charging, and uses a 2.6 mm × 2.0 mm WLCSP-20 package. It serves as the primary charging and system-power arbitration IC in portable Li-ion devices requiring dead-battery startup and USB-compatible input handling.

For engineers reviewing the ADP5061ACBZ-5-R7 datasheet, ADP5061ACBZ-5-R7 pinout, ADP5061ACBZ-5-R7 application, or ADP5061ACBZ-5-R7 equivalent, this page provides verified functional identity, interrupt-capable GPIO behavior (DIG_IO3 = open-drain flag), JEITA1/2 thermal charging control, 4.0–6.7 V operating input range, and 20 V tolerant VBUS interface - all confirmed for the exact -5-R7 variant.

Technical Context

The ADP5061ACBZ-5-R7 implements dual-mode operation: linear charging with programmable current limits (100 mA to 1500 mA) and LDO regulation delivering up to 2.1 A at 4.3 V or 5.0 V. Its power path architecture integrates an internal 30 mΩ isolation FET between ISO_B and ISO_S, enabling system power-up even with zero battery voltage.

It features factory-configurable DIG_IO pins: DIG_IO3 is explicitly designated as an interrupt output (open-drain pull-down FET) per ordering row, signaling events like charge termination or thermal warning via I²C register 0x09. The device supports JEITA1 or JEITA2 battery temperature profiles with NTC thermistor-based cold/hot cutoffs at 0°C and 60°C.

Key Specifications

Pinout & Package

ADP5061ACBZ-5-R7 uses a 20-ball Wafer-Level Chip Scale Package (WLCSP) with 0.5 mm pitch, arranged in a 5×4 array (2.6 mm × 2.0 mm). Ball A1 is marked by corner chamfer per Figure 3.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar linear battery charger with power path applications.

Compared with BQ24075RGTR and MAX14746ETA+, the ADP5061ACBZ-5-R7 uniquely combines JEITA1/2 compliance, a factory-assigned interrupt output (DIG_IO3), and ultra-compact WLCSP packaging - making it optimal for space-constrained, safety-critical single-cell portable devices requiring autonomous thermal management.

Availability

ADP5061ACBZ-5-R7 is available at Aetrix Electronics and suitable for mobile phones, digital cameras, portable medical monitors, and GPS trackers requiring stable component supply, JEITA-compliant charging, and dead-battery recovery capability.

Supply support for ADP5061ACBZ-5-R7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The ADP5061 product line delivers highly integrated, USB-compliant linear battery chargers with power path and thermal intelligence - designed specifically for compact, battery-powered consumer and medical devices demanding reliability and regulatory compliance.

FAQ

What is the specific function of DIG_IO3 on ADP5061ACBZ-5-R7?

DIG_IO3 on ADP5061ACBZ-5-R7 is configured as an interrupt output - an open-drain pull-down FET that asserts low when enabled events (e.g., charge termination, thermal warning, or safety timeout) occur. This behavior is fixed for the -5-R7 variant and is controlled via I²C register 0x09 interrupt mask settings. Unlike other ADP5061 variants, DIG_IO3 does not serve as a charging enable input in this part number.

Does ADP5061ACBZ-5-R7 support JEITA-compliant charging out of the box?

Yes, ADP5061ACBZ-5-R7 supports JEITA1 by default and can be configured for JEITA2 via I²C register programming. It enforces cold (0°C) and hot (60°C) charging cutoffs, reduces termination voltage by 100 mV in warm zones (45°C), and scales charge current in cool ranges (10°C) - all using the THR pin and internal NTC bias circuitry without external components.

What is the maximum continuous current the ADP5061ACBZ-5-R7 can deliver in LDO mode?

The ADP5061ACBZ-5-R7 delivers up to 2.1 A continuously in LDO mode at regulated system voltages of 4.3 V or 5.0 V. This is supported by its internal high-voltage blocking FET (R_DS(ON) = 330–485 mΩ) and thermal regulation circuitry, which activates isothermal charging at 115°C and shuts down at 140°C to prevent damage.

How does ADP5061ACBZ-5-R7 handle a completely dead battery (0 V)?

ADP5061ACBZ-5-R7 enables immediate system power-up from a dead battery using its 30 mΩ internal isolation FET. When VIN is applied, the device routes power from VBUS through ISO_S pins to the system rail before initiating trickle charge (20 mA min) on BAT_SNS. SYS_EN remains low until battery voltage exceeds V_WEAK (2.89–3.11 V), ensuring safe system enable timing.

What package type and dimensions does ADP5061ACBZ-5-R7 use?

ADP5061ACBZ-5-R7 uses a 20-ball Wafer-Level Chip Scale Package (WLCSP) measuring 2.6 mm × 2.0 mm with 0.5 mm ball pitch. The package follows a 5×4 array layout, with ball A1 identified by a corner chamfer. This ultra-compact footprint is optimized for thin, space-constrained portable electronics such as smartphones and wearable medical devices.