Analog Devices Inc. ADP5070ACPZ

Overview

ADP5070 from Analog Devices is a dual DC-to-DC switching regulator IC that independently generates programmable positive (up to +39 V) and negative (down to VIN − 39 V) output rails from a single 2.85 V to 15 V input. It integrates a 1.0 A boost switch and 0.6 A inverting switch, operates at 1.2 MHz or 2.4 MHz, and supports external frequency synchronization from 1.0 MHz to 2.6 MHz for noise-sensitive RF power amplifier bias applications.

For engineers reviewing the ADP5070 datasheet, ADP5070 pinout, ADP5070 application, or ADP5070 equivalent, key selection considerations include independent output regulation, slew rate control for EMI reduction, true shutdown with <10 μA quiescent current, and flexible start-up sequencing (VPOS-first, VNEG-first, or simultaneous).

Technical Context

The ADP5070 implements two independent PWM-controlled regulators: a boost converter for VPOS with 0.8 V feedback reference and an inverting buck-boost for VNEG with 1.6 V internal reference and 0.8 V FB2 threshold. Both use current-mode control with transconductance error amplifiers (gM = 270–330 μA/V), integrated MOSFETs (RDS(ON) = 175 mΩ boost / 350 mΩ inverter), and out-of-phase switching to minimize input ripple.

It features precision enable inputs (EN1/EN2) with 1.05 V threshold, resistor-programmable soft start (4–32 ms), slew rate control via SLEW pin (open/VREG/AGND), and comprehensive protection including UVLO (2.85 V rising), OCP (1.1 A boost / 0.66 A inverter), OVP (0.86 V at FB1 / 0.74 V at FB2), and thermal shutdown (150 °C).

Key Specifications

Pinout & Package

The ADP5070 is available in a 4 mm × 4 mm, 20-lead LFCSP (ACPZ suffix) with exposed pad connected to AGND, and also in 20-lead TSSOP. Both packages support −40°C to +125°C operation and feature identical pin functions.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-rail DC-DC regulator applications.

Compared with ADP5071 and LT3582, the ADP5070 offers optimal balance of voltage range (+39 V/−39 V), integrated protection, and EMI control features at its 1.0 A / 0.6 A current class - making it ideal for precision analog and RF bias where headroom and noise matter more than peak current.

Availability

ADP5070 is available at Aetrix Electronics and suitable for RF power amplifier bias, CCD imaging systems, and precision bipolar instrumentation requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for ADP5070 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The ADP5070 belongs to Analog Devices' precision power management product line, designed specifically for applications demanding tightly regulated dual-rail supplies with low noise, high voltage range, and robust protection - such as test & measurement, medical imaging, and optical communications.

FAQ

What is the maximum positive output voltage achievable with the ADP5070?

The ADP5070 supports an adjustable positive output voltage up to +39 V, set via the FB1 resistor divider with a 0.8 V feedback reference. This is verified across input voltages from 2.85 V to 15 V and over the full −40°C to +125°C junction temperature range, as specified in the Rev. E datasheet Table 2.

Can the ADP5070 generate symmetric ±15 V outputs from a 5 V input?

Yes, the ADP5070 can generate symmetric ±15 V outputs from a 5 V input: the boost regulator delivers +15 V (VPOS), while the inverting regulator delivers −15 V (VNEG = VIN − 39 V → 5 V − 39 V = −34 V max, so −15 V is well within range). The ADP5070 datasheet Figure 7 and Figure 8 confirm ≥300 mA output capability at VNEG = −15 V with 5 V input.

Does the ADP5070 support external frequency synchronization?

Yes, the ADP5070 supports external frequency synchronization via the SYNC/FREQ pin, accepting an external clock from 1.0 MHz to 2.6 MHz. This capability is explicitly documented in Table 2 (Oscillator Circuit section) and General Description, enabling noise-sensitive applications like RF PA bias to align switching edges with system timing domains.

What is the purpose of the SEQ pin on the ADP5070?

The SEQ pin on the ADP5070 controls startup sequencing: leaving it open enables manual individual enable (EN1/EN2), connecting it to VREG enables simultaneous startup, and pulling it low configures sequenced startup (VPOS-first or VNEG-first depending on which EN pin rises first). This behavior is defined in Table 5 Pin Function Descriptions and confirmed in the Start-Up Sequence section (Page 15).

How does the SLEW pin affect ADP5070 performance?

The SLEW pin on the ADP5070 selects driver slew rate: open = fastest (best efficiency), VREG = normal, AGND = slowest (best EMI/noise performance). This three-level control directly impacts switching node rise/fall times and is validated in Typical Performance Characteristics (Figures 29–33 show transient response differences) and Theory of Operation (Page 15).