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Analog Devices Inc. ADP5071AREZ-R7
- Part No.:
- ADP5071AREZ-R7
- Manufacturer:
- Analog Devices Inc.
- Package:
- 20-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
ADP5071AREZ-R7.pdf
- Description:
- IC REG BST SEPIC ADJ DL 20TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:994
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Product details
Overview
ADP5071AREZ-R7 from Analog Devices is a dual DC-to-DC switching regulator IC that independently generates programmable positive (up to +39 V) and negative (down to VIN − 39 V) output rails from a single 2.85 V to 15 V input. It integrates a 2.0 A boost switch and 1.2 A inverting switch, operates at 1.2 MHz or 2.4 MHz, and supports external frequency synchronization from 1.0 MHz to 2.6 MHz for noise-sensitive applications such as precision ADC/DAC biasing.
For engineers reviewing the ADP5071AREZ-R7 datasheet, ADP5071AREZ-R7 pinout, ADP5071AREZ-R7 application, or ADP5071AREZ-R7 equivalent, key selection criteria include independent output regulation, slew rate control for EMI reduction, true shutdown with <10 µA quiescent current, and flexible start-up sequencing (VPOS-first, VNEG-first, or simultaneous).
Technical Context
The ADP5071AREZ-R7 implements two independent PWM-controlled regulators: a boost converter generating VPOS and an inverting converter generating VNEG, operating 180° out of phase to minimize input ripple. Each uses internal error amplifiers (gM = 270–330 µA/V), programmable soft start (4–32 ms), and slew rate–controlled MOSFET drivers to reduce EMI.
It features precision enable inputs (EN1/EN2 with 1.05 V threshold), resistor-programmable feedback (VFB1 = 0.8 V, VREF − VFB2 = 0.8 V), and comprehensive protection including UVLO (2.85 V rising), OCP (2.2 A boost / 1.32 A inverter), OVP, and thermal shutdown (150°C). The device supports SEPIC configuration via INBK pin for step-up/step-down operation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input voltage range | 2.85 V to 15 V - supports wide-input industrial, optical, and RF power supply designs without pre-regulation. |
| Positive output range | Up to +39 V - enables high-voltage bias for CCDs, RF PAs, and op-amp rails. |
| Negative output range | Down to VIN − 39 V - delivers deep negative rails (e.g., −34 V at 5 V input) for bipolar analog circuits. |
| Switching frequency | 1.2 MHz or 2.4 MHz (pin-selectable); 1.0–2.6 MHz sync-capable - allows EMI filtering optimization and layout simplification. |
| Boost switch current limit | 2.2 A typical - supports ≥2 A continuous output at moderate VPOS (e.g., 15 V) with proper thermal design. |
| Inverter switch current limit | 1.32 A typical - delivers ≥1.2 A negative output (e.g., −15 V) with low RDS(ON) = 350 mΩ. |
| Quiescent current | 4.0 mA typical (operating), 10 µA max (shutdown) - minimizes standby power in battery-backed systems. |
| Junction temperature range | −40°C to +125°C - qualified for automotive under-hood and industrial control environments. |
Pinout & Package
The ADP5071AREZ-R7 is packaged in a 20-lead 4 mm × 4 mm LFCSP (Lead Frame Chip Scale Package) with exposed pad, requiring connection of the EPAD to AGND for thermal and electrical performance. Pin compatibility is identical to the 20-lead TSSOP variant per datasheet Figures 2 and 3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN1, EN2 | Precision enable inputs | Independent 1.05 V threshold enables controlled sequencing: VPOS-first, VNEG-first, or simultaneous startup. |
| FB1, FB2 | Feedback inputs | Resistor-divider nodes for VPOS (0.8 V reference) and VNEG (0.8 V below 1.6 V VREF) - enable precise output programming. |
| SW1, SW2 | Switching nodes | High-side boost (SW1) and inverting (SW2) power switches - require external inductors/diodes/capacitors per topology. |
| SEQ | Startup sequence control | Selects manual, simultaneous, or sequenced startup by connecting to VREG, AGND, or left open. |
| SLEW | Driver slew rate control | Configures fast (open), normal (to VREG), or slow (to AGND) edge rates - directly trades efficiency vs. EMI. |
| SYNC/FREQ | Oscillator control | Pin-selects 1.2 MHz (low) or 2.4 MHz (high), or accepts external 1.0–2.6 MHz clock for system-level noise coordination. |
| VREF, VREG | Internal references | VREF = 1.60 V (inverter reference), VREG = 4.25 V (internal LDO) - both require 1.0 µF ceramic decoupling to AGND. |
| INBK | Boost input disconnect | Enables SEPIC mode for automatic step-up/step-down operation - critical for wide-input-range applications. |
| PGND, AGND | Ground terminals | Separate power (PGND) and analog (AGND) grounds - must be joined only at single point near EPAD for noise isolation. |
Key Features
| Feature | Design Value |
|---|---|
| Independent output regulation | Separate FB1/FB2 loops allow simultaneous +15 V and −15 V outputs with ±1.5% accuracy over −40°C to +125°C. |
| Slew rate programmability | Three SLEW pin states adjust driver edge speed - reduces conducted EMI by >10 dB without sacrificing >85% efficiency. |
| True shutdown mode | Both regulators fully disconnect loads; ISHDN ≤ 10 µA ensures zero-load leakage in sleep-critical systems. |
| Out-of-phase switching | 180° phase shift between SW1 and SW2 cuts input capacitor RMS current by ~30%, reducing size and heating. |
| Flexible start-up sequencing | SEQ pin configures VPOS-first, VNEG-first, or simultaneous ramp - prevents latch-up in op-amp and multiplexer bias networks. |
| Integrated protection suite | UVLO, OCP, OVP, and TSD operate autonomously - eliminates need for external fault monitoring circuitry. |
Applications
| Bipolar Amplifier Bias Supply | CCD Bias Supply |
|---|---|
Use Scenario: Powering high-precision instrumentation op-amps requiring symmetric ±15 V rails with tight regulation and low noise. IC Role / Device Role / Timing Role: Dual-rail DC-DC regulator providing isolated, independently trimmed positive and negative supplies. Use Value: Enables rail-to-rail input/output swing and <0.01% THD+N in audio and sensor signal chains via low-noise, slew-controlled switching. | Use Scenario: Generating high-voltage negative bias (e.g., −24 V) for charge-coupled device pixel arrays in scientific imaging. IC Role / Device Role / Timing Role: Inverting regulator delivering deep negative output with programmable soft-start to prevent CCD gate stress during power-up. Use Value: Achieves −34 V output from 5 V input using integrated 1.2 A switch, eliminating discrete charge-pump complexity. |
| Optical Module Supply | RF Power Amplifier Bias |
Use Scenario: Providing stable +5 V and −5.2 V rails for laser diode drivers and transimpedance amplifiers in SFP+ modules. IC Role / Device Role / Timing Role: Compact dual-output regulator with 1.2 MHz switching and SYNC input for co-location with high-speed serial data lanes. Use Value: Reduces board area by 40% vs. discrete buck/inverter solutions while meeting GR-468 reliability for telecom optics. | Use Scenario: Supplying +28 V and −5 V bias to GaAs/GaN RF power amplifier stages in wireless infrastructure. IC Role / Device Role / Timing Role: Boost regulator (VPOS) and inverter (VNEG) delivering high-efficiency, thermally robust bias under dynamic load conditions. Use Value: Supports 2.0 A peak boost current and 1.2 A inverter current with thermal shutdown at 150°C - sustains PA linearity across ambient extremes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output DC-DC regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADP5070ACPZ-R7 | Lower boost (1.0 A) and inverter (0.6 A) current ratings; same pinout and feature set. | Suitable for lower-power bipolar rails (<500 mA) where thermal margin is constrained. | Select when output current demand is ≤1 A and cost sensitivity outweighs headroom needs. |
| LT3582EFE#PBF | Single 2.5 A switch supporting boost + inverting topologies; no independent regulation or SEQ/SLEW pins. | Requires external compensation and lacks precision sequencing - better for cost-optimized, non-critical bias rails. | Choose for simpler BOM count where independent VPOS/VNEG trimming and EMI control are secondary. |
Compared with ADP5070ACPZ-R7 and LT3582EFE#PBF, the ADP5071AREZ-R7 uniquely delivers 2.0 A/1.2 A independent switching, programmable slew rate, and three-mode sequencing - making it optimal for high-fidelity analog, optical, and RF bias where regulation integrity and noise control are primary.
Availability
ADP5071AREZ-R7 is available at Aetrix Electronics and suitable for optical module supply, RF power amplifier bias, and bipolar amplifier bias supply requiring stable component supply across industrial temperature ranges and long production lifecycles.
Supply support for ADP5071AREZ-R7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.
The ADP5071AREZ-R7 belongs to Analog Devices' precision power management product line, designed specifically for applications demanding tightly regulated dual-polarity rails with low noise, high efficiency, and robust protection in space-constrained layouts.
FAQ
What is the maximum positive output voltage achievable with the ADP5071AREZ-R7?
The ADP5071AREZ-R7 supports an adjustable positive output voltage up to +39 V, limited by the 39 V maximum drain-source voltage rating of its integrated 2.0 A boost switch. This is achieved using external resistor dividers on the FB1 pin referenced to the 0.8 V internal feedback voltage, and requires appropriate external components (inductor, diode, capacitor) rated for the target voltage and current.
Does the ADP5071AREZ-R7 support synchronization to an external clock source?
Yes, the ADP5071AREZ-R7 supports external clock synchronization via the SYNC/FREQ pin, accepting input frequencies from 1.0 MHz to 2.6 MHz. This capability allows system-level noise coordination in sensitive applications such as high-speed data converters or RF transceivers, and avoids beat frequencies that could degrade signal integrity.
How does the SEQ pin affect startup behavior of the ADP5071AREZ-R7?
The SEQ pin on the ADP5071AREZ-R7 determines startup sequencing: left open enables manual control via EN1/EN2; pulled high to VREG enables simultaneous VPOS/VNEG startup; pulled low selects sequenced startup where either EN1 or EN2 initiates the first rail. This prevents reverse current flow and latch-up in downstream analog circuitry like op-amps and multiplexers.
What is the purpose of the SLEW pin on the ADP5071AREZ-R7?
The SLEW pin on the ADP5071AREZ-R7 controls the slew rate of the internal MOSFET drivers for SW1 and SW2. Leaving it open provides fastest edges (best efficiency), connecting to VREG gives normal slew, and tying to AGND yields slowest edges (lowest EMI). This direct hardware control allows designers to optimize the trade-off between switching loss and electromagnetic compatibility without changing layout or components.
Can the ADP5071AREZ-R7 generate negative output voltages deeper than −15 V?
Yes, the ADP5071AREZ-R7 can generate negative output voltages down to VIN − 39 V - for example, −34 V when supplied from 5 V input. This is enabled by its integrated 1.2 A inverting switch with 39 V VDS(MAX), and is programmed via the FB2 pin using a resistor divider referenced to the 1.6 V VREF pin. Output accuracy remains within ±1.5% over temperature.
ADP5071AREZ-R7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 20-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Up, Step-Up/Step-Down
- Output Configuration:
- Positive and Negative (Dual Rail)
- Topology:
- Boost, SEPIC
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 2.85V
- Voltage - Input (Max):
- 15V
- Voltage - Output (Min/Fixed):
- 0.8V, 1.6V
- Voltage - Output (Max):
- ±39V
- Current - Output:
- 1.2A, 2A
- Frequency - Switching:
- 1.2MHz, 2.4MHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-TSSOP-EP
ADP5071AREZ-R7 FAQ
1.How can I place an order for ADP5071AREZ-R7 through Aetrix?
Please submit a Request for Quotation (RFQ) for ADP5071AREZ-R7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADP5071AREZ-R7 reliable?
The price and inventory of ADP5071AREZ-R7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADP5071AREZ-R7 is usually 5 days.
3.What payment methods are accepted for ADP5071AREZ-R7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADP5071AREZ-R7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADP5071AREZ-R7?
ADP5071AREZ-R7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADP5071AREZ-R7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADP5071AREZ-R7?
For technical support, including ADP5071AREZ-R7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADP5071AREZ-R7 requirements.
6.How does Aetrix verify that ADP5071AREZ-R7 is sourced from the original manufacturer or authorized distributors?
All ADP5071AREZ-R7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADP5071AREZ-R7 meets industry standards.
7.What is the process for return or replacement of ADP5071AREZ-R7?
All ADP5071AREZ-R7 units undergo pre-shipment inspection (PSI). If there is an issue with ADP5071AREZ-R7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADP5071AREZ-R7 part is unused and in its original packaging.
Return procedure for ADP5071AREZ-R7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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