Analog Devices Inc. ADP5138WACPZ-1-R7
- Part No.:
- ADP5138WACPZ-1-R7
- Manufacturer:
- Analog Devices Inc.
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 28-WFQFN Exposed Pad, CSP
- Datasheet:
-
ADP5138WACPZ-1-R7.pdf
- Description:
- IC REG 5OUT BCK/LNR SYNC 28LFCSP
- Quantity:
- Payment:

- Shipping:

Inventory:1,099
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Product details
Overview
ADP5138WACPZ-1-R7 from Analog Devices is a quad 1 A synchronous step-down regulator with an integrated 250 mA RF LDO, designed for automotive and industrial point-of-load power delivery. It operates from 3 V to 5.5 V input, delivers fixed outputs (VOUT1 = 3.3 V, VOUT2 = 1.0 V, VOUT3 = 1.25 V, VOUT4 = 1.35 V, VOUT5 = 1.8 V), and runs at 3.2 MHz with 90° inter-channel phase shift to minimize input ripple.
For engineers reviewing the ADP5138WACPZ-1-R7 datasheet, ADP5138WACPZ-1-R7 pinout, ADP5138WACPZ-1-R7 application, or ADP5138WACPZ-1-R7 equivalent, this device supports precision enable control per channel, power-on reset (POR) assertion on voltage faults, active output discharge, and thermal/overcurrent protection - critical for automotive infotainment, ADAS domain controllers, and multi-rail instrumentation systems.
Technical Context
The ADP5138WACPZ-1-R7 implements a fixed-frequency (3.2 MHz), peak-current-mode PWM control architecture across four buck channels, each with independent precision enable inputs, internal compensation, and soft-start sequencing. The fifth channel is a low-noise RF LDO with 20 µVrms output noise (10 Hz–100 kHz) and 55 dB PSRR at 1 kHz.
All buck regulators operate 90° out of phase to reduce input capacitor RMS current and system EMI; synchronization via the SYNC pin supports external clocking from 2.8 MHz to 3.5 MHz. Protection includes OVLO (5.6–6.0 V), UVLO (2.9–3.0 V), UVM (4.05–4.35 V), TSD (150°C), and per-channel overcurrent limiting (1.28–1.92 A high-side peak).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 3 V to 5.5 V on PVIN1–PVIN4; 1.7 V to 5.5 V on PVIN5 - enables direct connection to automotive 3.3 V/5 V rails and post-regulated supplies. |
| Output Current | 1 A per buck channel (Ch1–Ch4); 250 mA on LDO (Ch5) - supports mixed-signal SoC core, I/O, memory, and RF subsystems simultaneously. |
| Switching Frequency | Fixed 3.2 MHz or syncable 2.8–3.5 MHz - places switching energy outside AM band (0.53–1.71 MHz) to avoid radio interference in automotive environments. |
| Phase Shift | 90° between adjacent buck channels - reduces total input ripple current by ~70% vs. in-phase operation, allowing smaller bulk input capacitors. |
| Output Accuracy | ±2% for buck outputs (VOUT1–VOUT4); ±2% for LDO (VOUT5) - ensures stable voltage margins for 1.0 V/1.25 V/1.35 V/1.8 V/3.3 V digital logic and RF bias rails. |
| Protection Features | OVLO, UVLO, UVM, POR, TSD, OCP, active discharge - provides fault containment without external supervision circuitry in harsh automotive transients. |
| Operating Temperature | −40°C to +125°C junction - qualified per AEC-Q100 Grade 1, suitable for under-hood and cabin-located ECUs. |
Pinout & Package
ADP5138WACPZ-1-R7 is housed in a 28-lead, 4 mm × 4 mm, 0.5 mm pitch LFCSP package with exposed thermal pad soldered to PCB ground plane for enhanced thermal performance (θJA = 32.6°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PVIN1–PVIN4 | Independent input power pins per buck channel | Enable separate input rail sourcing (e.g., battery, pre-regulator) to optimize efficiency and fault isolation per domain. |
| SW1–SW4 | Switch node outputs for buck converters | Drive external inductors; require low-inductance layout and local ceramic bypassing to minimize EMI and voltage spikes. |
| PGND1–PGND4 | Power ground returns per buck channel | Isolate high di/dt return paths to prevent coupling between regulators and reduce ground bounce. |
| FB1–FB4, FB5 | Feedback voltage sense inputs | Connect to resistor dividers for adjustable versions; tied directly to VOUTx for factory-fixed outputs (as in ADP5138WACPZ-1-R7). |
| EN1–EN5 | Precision enable inputs (1.2 V rising threshold) | Support independent power-up sequencing and dynamic enable/disable per rail - critical for SoC boot order and low-power states. |
| POR | Open-drain power-on reset output | Asserts low when any output falls below 93% or rises above 112% of nominal - used to hold microcontroller reset until all rails stabilize. |
| SYNC | External clock synchronization input | Accepts 2.8–3.5 MHz CMOS clock; synchronizes Channel 1 to external source to eliminate beat frequencies in multi-IC systems. |
| AVIN | Bias supply for internal analog circuitry | Must be connected to PVINx and decoupled with ≥1 µF ceramic cap - ensures stable reference, POR, and enable comparator operation. |
Key Features
| Feature | Design Value |
|---|---|
| 90° interleaved buck phase shift | Reduces input ripple current amplitude by √2 and RMS by ~70%, enabling smaller, lower-cost input capacitors and lower EMI filter requirements. |
| Integrated POR with voltage fault detection | Monitors all five outputs and AVIN; asserts open-drain POR signal within 5–6.8 ms if any rail deviates >7% low or >10% high - eliminates need for external supervisor IC. |
| Active output discharge on shutdown | Internal 64–100 Ω discharge path per buck channel and 83–120 Ω on LDO - ensures rapid, controlled rail collapse to prevent latch-up or back-powering in multi-rail systems. |
| RF-optimized LDO (Channel 5) | 20 µVrms noise (10 Hz–100 kHz) and 55 dB PSRR at 1 kHz - delivers ultra-clean 1.8 V bias for RF transceivers, PLLs, and ADC/DAC references without external filtering. |
| Automotive-grade thermal protection | Thermal shutdown at 150°C with 15°C hysteresis - sustains operation in high-ambient environments (e.g., engine bay, head units) while preventing permanent damage. |
Applications
| Automotive Infotainment System | ADAS Domain Controller |
|---|---|
Use Scenario: Powering SoC (CPU/GPU), DDR memory, display interface, and audio codec in head unit or digital cluster. IC Role / Device Role / Timing Role: Single-chip multi-rail PMIC delivering 3.3 V (I/O), 1.35 V (DDR), 1.25 V (core), 1.0 V (GPU), and 1.8 V (audio PLL) with precise sequencing and POR. Use Value: Eliminates 5 discrete regulators and external supervisors; 90° phase shift cuts input capacitance by 40% and meets CISPR-25 Class 5 EMI limits. |
Use Scenario: Supplying radar processor, camera ISP, and sensor fusion MCU in centralized ADAS ECU. IC Role / Device Role / Timing Role: Provides isolated, low-noise rails for high-speed SerDes (1.0 V), vision processing cores (1.25 V), memory (1.35 V), and RF front-end (1.8 V LDO). Use Value: RF LDO's 20 µVrms noise prevents phase jitter in 77 GHz radar clocks; POR ensures deterministic boot after cold crank (4.2 V UVM detection). |
| Industrial PLC I/O Module | Medical Imaging Sensor Interface |
Use Scenario: Powering FPGA, ADCs, isolated communication interfaces (RS-485/CAN), and analog front-end in modular PLC base. IC Role / Device Role / Timing Role: Delivers 3.3 V (FPGA I/O), 1.25 V (FPGA core), 1.35 V (DDR3), 1.0 V (ADC digital), and 1.8 V (CAN transceiver bias) with independent EN control. Use Value: Precision enable thresholds (±0.1 V) allow reliable startup across wide industrial temperature range (−40°C to +85°C ambient); TSD protects during enclosure overheating. |
Use Scenario: Biasing high-resolution CT/MRI sensor ASICs, low-noise amplifiers, and time-of-flight detectors requiring ultra-stable analog supplies. IC Role / Device Role / Timing Role: Supplies 3.3 V (ASIC I/O), 1.25 V (ASIC core), 1.8 V (LNA bias), and clean 1.8 V RF LDO output for clock distribution and ADC reference buffers. Use Value: LDO PSRR >55 dB at 1 kHz suppresses switching noise from buck regulators; <0.005%/mA load regulation maintains ADC INL across varying sensor gain settings. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-rail PMIC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65381A-Q1 | Triple 1.5 A buck + dual LDO; no 90° phase shift; 2.2 MHz fixed frequency; requires external POR. | Lacks RF-optimized LDO and interleaving - less suitable for noise-sensitive radar/audio; higher input ripple demands larger input caps. | Prefer when higher per-channel current (>1 A) is needed and RF noise immunity is secondary. |
| MAX20029ATG/V+T | Quad 1.2 A buck + single 300 mA LDO; 2.2 MHz; integrated watchdog timer; no SYNC pin. | Includes watchdog but lacks programmable enable thresholds and AVIN bias monitoring - weaker fault coverage for safety-critical boot. | Choose when system-level watchdog functionality is prioritized over fine-grained rail sequencing and POR accuracy. |
Compared with TPS65381A-Q1 and MAX20029ATG/V+T, ADP5138WACPZ-1-R7 uniquely combines 90° interleaving for EMI reduction, a dedicated low-noise RF LDO, and AVIN-based UVM/OVLO monitoring - making it optimal for automotive infotainment and ADAS where spectral purity and fault-aware power sequencing are mandatory.
Availability
ADP5138WACPZ-1-R7 is available at Aetrix Electronics and suitable for automotive infotainment, ADAS domain controllers, and industrial PLC I/O modules requiring stable component supply, AEC-Q100 qualification, and long-term lifecycle support.
Supply support for ADP5138WACPZ-1-R7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving automotive, industrial, communications, and healthcare markets since 1965.
The ADP5138WACPZ-1-R7 belongs to Analog Devices' automotive-qualified power management portfolio, engineered specifically for multi-rail, low-EMI, high-reliability point-of-load conversion in next-generation vehicle electronics.
FAQ
What are the factory-set output voltages for ADP5138WACPZ-1-R7?
The ADP5138WACPZ-1-R7 has five fixed output voltages: VOUT1 = 3.3 V, VOUT2 = 1.0 V, VOUT3 = 1.25 V, VOUT4 = 1.35 V, and VOUT5 = 1.8 V. These are factory-programmed and do not require external feedback resistors; FB pins are internally connected to their respective outputs.
Does ADP5138WACPZ-1-R7 support power sequencing across its five channels?
Yes, ADP5138WACPZ-1-R7 supports independent power sequencing via five precision enable inputs (EN1–EN5). Each EN pin has a 1.2 V typical rising threshold and 1.1 V falling threshold, allowing controlled turn-on/turn-off order. Startup sequence delay is 500–700 µs, and soft-start times range from 425–575 µs per buck channel.
How does the 90° phase shift in ADP5138WACPZ-1-R7 reduce system EMI?
The 90° phase shift among the four buck regulators causes input current ripples to partially cancel, reducing total RMS input ripple current by ~70%. This lowers conducted EMI and allows use of smaller, lower-ESR input capacitors - a key advantage for meeting stringent automotive CISPR-25 emission limits without added filtering.
What protection features are integrated into ADP5138WACPZ-1-R7?
ADP5138WACPZ-1-R7 integrates input OVLO (5.6–6.0 V), UVLO (2.9–3.0 V), and UVM (4.05–4.35 V); per-channel overcurrent protection (1.28–1.92 A peak); thermal shutdown (150°C); output undervoltage/overvoltage monitoring; and active output discharge. All trigger the open-drain POR signal for system-level fault response.
Is ADP5138WACPZ-1-R7 qualified for automotive applications?
Yes, ADP5138WACPZ-1-R7 is AEC-Q100 Grade 1 qualified (−40°C to +125°C junction), manufactured in an IATF 16949-certified facility, and designed for automotive infotainment, telematics, and ADAS applications. Its robust protection suite and wide operating temperature range meet ISO 16750-2 electrical transient requirements.
ADP5138WACPZ-1-R7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-WFQFN Exposed Pad, CSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (4), Linear (LDO) (1)
- Number of Outputs:
- 5
- Frequency - Switching:
- 3.2MHz
- Voltage/Current - Output 1:
- 3.3V, 1A
- Voltage/Current - Output 2:
- Adj to 0.8V, 1A
- Voltage/Current - Output 3:
- Adj to 0.8V, 1A
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 3V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- Automotive
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-LFCSP-WQ (4x4)
ADP5138WACPZ-1-R7 FAQ
1.How can I place an order for ADP5138WACPZ-1-R7 through Aetrix?
Please submit a Request for Quotation (RFQ) for ADP5138WACPZ-1-R7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADP5138WACPZ-1-R7 reliable?
The price and inventory of ADP5138WACPZ-1-R7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADP5138WACPZ-1-R7 is usually 5 days.
3.What payment methods are accepted for ADP5138WACPZ-1-R7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADP5138WACPZ-1-R7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADP5138WACPZ-1-R7?
ADP5138WACPZ-1-R7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADP5138WACPZ-1-R7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADP5138WACPZ-1-R7?
For technical support, including ADP5138WACPZ-1-R7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADP5138WACPZ-1-R7 requirements.
6.How does Aetrix verify that ADP5138WACPZ-1-R7 is sourced from the original manufacturer or authorized distributors?
All ADP5138WACPZ-1-R7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADP5138WACPZ-1-R7 meets industry standards.
7.What is the process for return or replacement of ADP5138WACPZ-1-R7?
All ADP5138WACPZ-1-R7 units undergo pre-shipment inspection (PSI). If there is an issue with ADP5138WACPZ-1-R7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADP5138WACPZ-1-R7 part is unused and in its original packaging.
Return procedure for ADP5138WACPZ-1-R7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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