Analog Devices Inc. ADRF6604-EVALZ

Overview

ADRF6604-EVALZ from Analog Devices is an evaluation board for the ADRF6604 high-dynamic-range RF receiver mixer with integrated fractional-N PLL and VCO. It supports RF input from 1200 MHz to 3600 MHz, internal LO generation from 2500 MHz to 2900 MHz, 6.8 dB voltage conversion gain, 500 MHz IF bandwidth, and SPI programmability. It enables rapid prototyping of cellular base station front-ends.

For engineers reviewing the ADRF6604-EVALZ datasheet, ADRF6604-EVALZ setup guide, ADRF6604-EVALZ schematic, or ADRF6604-EVALZ software interface, this page provides verified hardware configuration details, power sequencing guidance, SPI register mapping support, and RF calibration procedures specific to the ADRF6604-EVALZ platform.

Technical Context

The ADRF6604-EVALZ implements a complete signal chain for evaluating the ADRF6604 IC, including on-board 50 Ω RF input matching, differential 200 Ω IF output termination, adjustable loop filter components for PLL stability, and configurable bias networks for IIP3 optimization via the IP3SET pin. It supports both internal PLL-synthesized and external LO injection modes.

Hardware features include SMA connectors for RFIN, IFP/IFN, REF_IN, LOP/LON, and VTUNE; jumpers for VCC supply selection (5 V or 3.3 V); solder pads for RSET and CDAC tuning; and test points for all critical DC supplies and control signals (PLL_EN, LODRV_EN, LE, CLK, DATA). The board uses a 4-layer PCB with controlled impedance routing and dedicated ground planes.

Key Specifications

Availability

ADRF6604-EVALZ is available at Aetrix Electronics and suitable for cellular base station development, RF front-end characterization, and high-frequency receiver design requiring stable component supply, calibrated reference hardware, and production-ready evaluation infrastructure.

Supply support for ADRF6604-EVALZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with design centers worldwide and a focus on precision, power efficiency, and RF innovation.

The ADRF6604-EVALZ belongs to Analog Devices' RF & Microwave Evaluation Platform family, engineered specifically to accelerate time-to-test for highly integrated transceiver ICs used in 4G/5G infrastructure, wireless backhaul, and broadband communications systems.

FAQ

What is the primary function of the ADRF6604-EVALZ?

The ADRF6604-EVALZ is an evaluation board designed exclusively to characterize and validate the ADRF6604 RF mixer IC. It provides full hardware support-including RF/IF connectivity, PLL loop filter tuning, SPI programming interface, and power regulation-for testing the device's 1200–3600 MHz receive performance, internal LO synthesis, noise figure, and linearity under real-world conditions. The ADRF6604-EVALZ does not operate as a standalone product but serves as a reference platform for system-level integration.

Does the ADRF6604-EVALZ support external LO injection?

Yes, the ADRF6604-EVALZ supports external LO injection via the LOP and LON SMA connectors. When PLL_EN is set low or configured via SPI Register 5 (PLEN = 0), the internal PLL is disabled and the external 1× LO signal (250–6000 MHz) is routed directly to the ADRF6604 mixer core. The board includes matching networks and DC blocking capacitors optimized for this mode, and LODRV_EN can be asserted to enable LO output buffering if needed. This capability allows comparative analysis between internal and external LO architectures using the same ADRF6604-EVALZ hardware.

How is IIP3 optimized on the ADRF6604-EVALZ?

IIP3 optimization on the ADRF6604-EVALZ is achieved through two complementary methods: (1) configuring the IP3SET pin-leaving it open yields 27.5 dBm typical IIP3, while applying 3.3 V raises it to 28 dBm-and (2) adjusting the CDAC register (Register 2, default 0x001802) to fine-tune mixer bias. The board provides test points and solder pads for direct probing and optional resistor placement on IP3SET, and the SPI interface allows dynamic CDAC updates during live measurement sweeps. These controls are validated across temperature and frequency per Table 2 of the ADRF6604 datasheet Rev. B.

What power supply requirements does the ADRF6604-EVALZ have?

The ADRF6604-EVALZ requires a single 5 V ±5% DC supply delivering up to 300 mA peak current (274 mA typical in internal LO mode). Onboard LDOs generate regulated 3.3 V (VCC1), 2.5 V (VCC2), and dedicated rails for LO, mixer, and V2I stages. Jumper settings (JP1–JP5) allow selection between 5 V and 3.3 V for certain supplies to match host system constraints. All supply pins are decoupled with 0.1 µF ceramic and 100 pF NP0 capacitors placed adjacent to each ADRF6604 power pin, per the IC's layout guidelines in the datasheet.

Can the ADRF6604-EVALZ be used for phase noise measurements?

Yes, the ADRF6604-EVALZ supports phase noise characterization via its accessible VTUNE, REF_IN, MUXOUT (lock detect), and LOP/LON nodes. The board's low-noise power distribution, grounded exposed paddle connection, and controlled-impedance VTUNE loop filter path preserve the ADRF6604's specified −126 dBc/Hz at 1 MHz offset (fLO = 2500–2900 MHz). Measurement accuracy is enhanced by the inclusion of SMA connectors for direct spectrum analyzer coupling and test points for probing without loading sensitive nodes. Phase noise data in Figures 32–37 of the ADRF6604 datasheet Rev. B were obtained using this evaluation platform.