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Home > Products > RF and Wireless > RF Mixers

Analog Devices Inc. ADRF6655ACPZ-R7

Name: ADRF6655ACPZ-R7
Brand: Analog Devices Inc.
SKU: ADRF6655ACPZ-R7
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: ADRF6655ACPZ-R7

Manufacturer:: Analog Devices Inc.

Category:: RF Mixers

Package:: 40-VFQFN Exposed Pad, CSP

Datasheet:: ADRF6655ACPZ-R7.pdf

Description:: IC MIXER 100MHZ-2.5GHZ 40LFCSP

Quantity:: RFQ Add To RFQ list

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Product details

Overview

ADRF6655ACPZ-R7 from Analog Devices is a broadband active up/downconverting mixer with integrated fractional-N PLL and VCO. It operates with RF input from 100 MHz to 2500 MHz, internal LO from 1050–2300 MHz, and delivers 6 dB voltage conversion gain, 29 dBm input IP3, and 12 dB SSB noise figure. It serves as a single-chip RF front-end core in LTE base station transceivers and software-defined radios.

For engineers reviewing the ADRF6655ACPZ-R7 datasheet, ADRF6655ACPZ-R7 pinout, ADRF6655ACPZ-R7 application, or ADRF6655ACPZ-R7 equivalent, key selection criteria include its dual-mode LO divider (÷2/÷3), programmable IP3SET bias control, SPI-configurable fractional-N synthesizer, and matched 200 Ω differential IF output interface for direct connection to ADCs or baseband filters.

Technical Context

The ADRF6655ACPZ-R7 integrates a high-linearity SiGe BiCMOS mixer with a fully programmable fractional-N PLL using a third-order interpolator and Σ-Δ modulator (modulus 1–2047). Its VCO core generates 2×fLO, which is divided by 2 or 3 to produce the final LO signal applied to the mixer.

Mixer performance is dynamically adjustable via the IP3SET pin: applying 3.2 V boosts IIP3 to 31 dBm (upconversion) or 27 dBm (downconversion) at the cost of ~20 mA additional supply current, while open-circuit operation yields 12 dBm P1dB and 12 dB SSB NF under typical conditions.

Key Specifications

Parameter	Value and Actual Design Meaning
RF Input Range	100–2500 MHz: supports multi-band cellular (700/800/900/1800/2100/2600 MHz) and wideband SDR front-ends without external preselection.
Internal LO Range	1050–2300 MHz (÷3 mode: 1050–1530 MHz; ÷2 mode: 1530–2300 MHz): enables flexible high-side or low-side injection across sub-3 GHz bands.
Input IP3	29 dBm (typ, IP3SET open): provides robust blocker rejection in dense RF environments such as macrocell base stations.
Voltage Conversion Gain	6 dB (typ, 200 Ω load): eliminates need for intermediate gain stages before ADCs or baseband amplifiers.
Noise Figure	12 dB SSB (typ, IP3SET open): ensures adequate sensitivity for receiver paths in FDD/TDD infrastructure equipment.
IF Output Impedance	200 Ω differential: matches standard transformer-based interfaces (e.g., TC4-1W) for optimal return loss and harmonic suppression.
SPI Interface	24-bit serial port with LE/CLK/DATA: allows full register-level control of PLL dividers, charge pump, LO path, and mixer bias via microcontroller or FPGA.

Pinout & Package

ADRF6655ACPZ-R7 is housed in a 40-lead, 6 mm × 6 mm exposed-paddle LFCSP package. The thermally enhanced EPAD must be soldered to a low-impedance ground plane per JESD51-2 for reliable thermal dissipation (θJA = 35°C/W).

Pin/Terminal	Circuit Role	Design Meaning
VCC1, VCC2, VCCLO, VCCMIX, VCCV2I	Dedicated power rails	Separate 5 V supplies for LDOs (3.3 V/2.5 V), LO buffer, mixer core, and V2I stage-enables independent decoupling and noise isolation.
INP / INN	Differential RF input	Internally matched to 50 Ω; AC-coupled; supports broadband antenna or filter interface without external matching networks.
OUTP / OUTN	Differential IF output	200 Ω output impedance; requires external pull-up chokes or balun for proper common-mode bias and 50 Ω system interfacing.
LOP / LON	LO input/output node	Provides access to internally generated 1×fLO; accepts external 2×fLO/3×fLO when internal synthesis is disabled.
VTUNE	VCO tuning voltage	Accepts filtered charge pump output (1–2.8 V range); directly controls VCO frequency in closed-loop PLL operation.
REFIN	Reference clock input	AC-coupled 10–160 MHz input; supports crystal oscillator or clock generator sources with 0.25–3.3 V_p-p swing.
CLK / DATA / LE	SPI serial interface	24-bit shift register control: LE latches data on rising edge; timing compliant up to 20 MHz clock (t_setup/t_hold ≥10 ns).
IP3SET	Mixer linearity bias control	Resistor-to-VCC sets current for optimized IP3 vs. current trade-off; 3.2 V yields +2–3 dB IIP3 improvement over open-circuit.

Key Features

Feature	Design Value
Broadband active mixer + integrated PLL/VCO	Eliminates discrete synthesizer and mixer ICs, reducing BOM count, layout area, and phase noise degradation from interconnects.
Programmable ÷2/÷3 LO divider	Enables identical hardware reuse across multiple frequency bands (e.g., 1800 MHz TX with ÷3, 2600 MHz TX with ÷2) without PCB change.
IP3SET linearization control	Adjusts mixer bias in real time to trade 20 mA supply current for +2–3 dB IIP3-critical for dynamic interference mitigation in TDD systems.
200 Ω differential IF output	Directly interfaces with off-the-shelf 200:50 Ω transformers (e.g., Mini-Circuits TC4-1W), simplifying impedance matching and improving second-harmonic rejection.
SPI-configurable fractional-N PLL	Σ-Δ modulator with 1–2047 modulus enables fine frequency resolution (<1 Hz step size) and low spurious content (<−83 dBc reference spurs).

Applications

Macrocell Base Station Transceiver	Small Cell Remote Radio Head
Use Scenario: Full-duplex FDD LTE eNodeB with 2×2 MIMO supporting 700–2600 MHz bands and 20 MHz channel bandwidth. IC Role / Device Role / Timing Role: Primary RF up/downconverter with integrated LO synthesis; handles both TX modulation and RX demodulation paths. Use Value: Reduces component count by replacing separate mixer + PLL + VCO; achieves <0.4°rms integrated phase noise at 1840 MHz for EVM compliance in 256-QAM.	Use Scenario: Outdoor 4G/5G small cell operating in unlicensed 3.5 GHz CBRS band with tight thermal constraints. IC Role / Device Role / Timing Role: Single-chip RF front-end for compact form factor; supports rapid frequency hopping between 3550–3700 MHz channels. Use Value: 35°C/W thermal resistance and −40°C to +85°C rating enable fanless operation; SPI reprogramming allows real-time LO retuning during handover.
Software-Defined Radio Platform	Defense Radar Front-End
Use Scenario: Wideband SDR testbed covering DC–2.5 GHz with real-time spectrum analysis and adaptive waveform generation. IC Role / Device Role / Timing Role: Reconfigurable mixer/PLL subsystem enabling rapid switching between upconversion (TX) and downconversion (RX) modes. Use Value: 24-bit SPI register map allows full control of N-divider, fractional modulus, charge pump, and mixer bias-enabling deterministic latency and repeatability.	Use Scenario: Pulse-Doppler radar receiver requiring ultra-low phase noise and high dynamic range in 1–2 GHz band. IC Role / Device Role / Timing Role: High-linearity downconverter with precision LO synthesis; rejects strong clutter signals while preserving weak target returns. Use Value: 27 dBm IIP3 (IP3SET = 3.2 V) and −136 dBc/Hz @ 1 MHz offset at 1840 MHz meet MIL-STD-461E radiated emissions and sensitivity requirements.

Macrocell Base Station Transceiver

Small Cell Remote Radio Head

Use Scenario: Full-duplex FDD LTE eNodeB with 2×2 MIMO supporting 700–2600 MHz bands and 20 MHz channel bandwidth.

IC Role / Device Role / Timing Role: Primary RF up/downconverter with integrated LO synthesis; handles both TX modulation and RX demodulation paths.

Use Value: Reduces component count by replacing separate mixer + PLL + VCO; achieves <0.4°rms integrated phase noise at 1840 MHz for EVM compliance in 256-QAM.

Use Scenario: Outdoor 4G/5G small cell operating in unlicensed 3.5 GHz CBRS band with tight thermal constraints.

IC Role / Device Role / Timing Role: Single-chip RF front-end for compact form factor; supports rapid frequency hopping between 3550–3700 MHz channels.

Use Value: 35°C/W thermal resistance and −40°C to +85°C rating enable fanless operation; SPI reprogramming allows real-time LO retuning during handover.

Software-Defined Radio Platform

Defense Radar Front-End

Use Scenario: Wideband SDR testbed covering DC–2.5 GHz with real-time spectrum analysis and adaptive waveform generation.

IC Role / Device Role / Timing Role: Reconfigurable mixer/PLL subsystem enabling rapid switching between upconversion (TX) and downconversion (RX) modes.

Use Value: 24-bit SPI register map allows full control of N-divider, fractional modulus, charge pump, and mixer bias-enabling deterministic latency and repeatability.

Use Scenario: Pulse-Doppler radar receiver requiring ultra-low phase noise and high dynamic range in 1–2 GHz band.

IC Role / Device Role / Timing Role: High-linearity downconverter with precision LO synthesis; rejects strong clutter signals while preserving weak target returns.

Use Value: 27 dBm IIP3 (IP3SET = 3.2 V) and −136 dBc/Hz @ 1 MHz offset at 1840 MHz meet MIL-STD-461E radiated emissions and sensitivity requirements.

Equivalent & Alternatives

The following parts are listed as comparable options for similar broadband RF mixer + synthesizer applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
ADRF6780ACPZ-R7	Higher IF output frequency support (up to 4.2 GHz), no integrated VCO (requires external VCO), lower IIP3 (26 dBm), same 40-lead LFCSP package.	Targeted at millimeter-wave upconversion where external VCO integration is preferred; lacks self-contained LO solution.	Select ADRF6780ACPZ-R7 only when external VCO control or >2.2 GHz IF bandwidth is required; otherwise ADRF6655ACPZ-R7 offers superior integration and linearity.
TRF372017IRGZT	Integrated PLL/VCO with narrower RF range (400–4000 MHz but degraded performance below 900 MHz), lower noise figure (9.5 dB), smaller 32-pin QFN package, no IP3SET adjustment.	Optimized for consumer-grade wireless infrastructure with tighter cost and size constraints; not qualified for extended temperature industrial use.	Choose TRF372017IRGZT for cost-sensitive, space-constrained designs below +70°C ambient; ADRF6655ACPZ-R7 remains preferred for high-reliability, wide-temperature, high-dynamic-range deployments.

Compared with ADRF6780ACPZ-R7 and TRF372017IRGZT, the ADRF6655ACPZ-R7 uniquely combines full self-contained LO synthesis, 29 dBm IIP3, and guaranteed −40°C to +85°C operation in a single 6 mm × 6 mm LFCSP-making it the only option qualified for macrocell base station and defense radar front-ends demanding simultaneous broadband coverage, high linearity, and rugged environmental tolerance.

Availability

ADRF6655ACPZ-R7 is available at Aetrix Electronics and suitable for macrocell base station transceivers, small cell remote radio heads, software-defined radio platforms, and defense radar front-ends requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for ADRF6655ACPZ-R7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The ADRF6655ACPZ-R7 belongs to Analog Devices' high-frequency RF transceiver IC product line, engineered specifically for infrastructure-grade wireless communications requiring integrated synthesis, exceptional linearity, and wideband operational flexibility.

FAQ

What is the maximum RF input frequency supported by the ADRF6655ACPZ-R7?

The ADRF6655ACPZ-R7 supports an RF input frequency range from 100 MHz to 2500 MHz, as specified in the datasheet under "RF INPUT FREQUENCY RANGE." This covers all major cellular bands including LTE Bands 12/13/14 (700 MHz), Band 4 (1700/2100 MHz), and Band 7 (2600 MHz), enabling single-device deployment across multi-band base station platforms. Operation beyond 2500 MHz is not characterized or guaranteed.

Does the ADRF6655ACPZ-R7 require external loop filter components for PLL operation?

Yes, the ADRF6655ACPZ-R7 requires an external passive loop filter between the CP pin and VTUNE pin. The charge pump output drives the filter, whose transfer function determines PLL stability, lock time, and phase noise performance. Recommended values for a 1.5 kHz loop bandwidth are C13 = 47 nF, C14 = 0.1 µF, C15 = 4.7 µF, R9 = 270 Ω, and R10 = 68 Ω, as validated on the standard evaluation board. No internal loop filter is integrated.

Can the ADRF6655ACPZ-R7 operate with an external LO instead of its internal synthesizer?

Yes, the ADRF6655ACPZ-R7 supports external LO injection via the LOP/LON pins. When internal LO generation is disabled through register programming, the device accepts either 2×fLO or 3×fLO (depending on selected divider mode) as an AC-coupled input. This allows substitution of a higher-performance external VCO or clock source while retaining the high-linearity mixer and IF interface of the ADRF6655ACPZ-R7.

What is the purpose of the IP3SET pin on the ADRF6655ACPZ-R7?

The IP3SET pin on the ADRF6655ACPZ-R7 adjusts the mixer's bias current to optimize third-order intercept point (IIP3) versus supply current. Connecting a resistor from IP3SET to VCC sets the bias level: 3.2 V yields ~2–3 dB higher IIP3 (e.g., 31 dBm in upconversion) at the cost of ~20 mA extra current, while leaving IP3SET open defaults to lower-current, lower-IIP3 operation (29 dBm). This enables runtime trade-off tuning in adaptive RF systems.

Is the ADRF6655ACPZ-R7 pin-compatible with other devices in the ADRF66xx family?

No, the ADRF6655ACPZ-R7 is not pin-compatible with earlier ADRF66xx devices such as ADRF6612 or ADRF6614. Although all share the 40-lead LFCSP package footprint, pin functions differ significantly-for example, ADRF6655ACPZ-R7 dedicates pins to separate VCC rails (VCC1, VCC2, VCCLO, VCCMIX, VCCV2I), whereas prior variants use fewer supply pins with internal regulation. Direct replacement requires full schematic and layout revision.

ADRF6655ACPZ-R7 Specifications

Product attributes: Attribute value

Manufacturer:: Analog Devices Inc.

Series:: -

Package/Case:: 40-VFQFN Exposed Pad, CSP

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

RF Type:: General Purpose

Frequency:: 100MHz ~ 2.5GHz

Number of Mixers:: 1

Gain:: 6dB

Noise Figure:: 12dB

Secondary Attributes:: Up/Down Converter

Current - Supply:: 310mA

Voltage - Supply:: 4.75V ~ 5.25V

Mounting Type:: Surface Mount

Supplier Device Package:: 40-LFCSP-VQ (6x6)

ADRF6655ACPZ-R7 FAQ

1.How can I place an order for ADRF6655ACPZ-R7 through Aetrix?

Please submit a Request for Quotation (RFQ) for ADRF6655ACPZ-R7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ADRF6655ACPZ-R7 reliable?

The price and inventory of ADRF6655ACPZ-R7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADRF6655ACPZ-R7 is usually 5 days.

3.What payment methods are accepted for ADRF6655ACPZ-R7?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADRF6655ACPZ-R7 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ADRF6655ACPZ-R7?

ADRF6655ACPZ-R7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ADRF6655ACPZ-R7 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ADRF6655ACPZ-R7?

For technical support, including ADRF6655ACPZ-R7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADRF6655ACPZ-R7 requirements.

6.How does Aetrix verify that ADRF6655ACPZ-R7 is sourced from the original manufacturer or authorized distributors?

All ADRF6655ACPZ-R7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADRF6655ACPZ-R7 meets industry standards.

7.What is the process for return or replacement of ADRF6655ACPZ-R7?

All ADRF6655ACPZ-R7 units undergo pre-shipment inspection (PSI). If there is an issue with ADRF6655ACPZ-R7, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ADRF6655ACPZ-R7 part is unused and in its original packaging.

Return procedure for ADRF6655ACPZ-R7:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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