Texas Instruments ADS114S06IPBS

Overview

ADS114S06IPBS from Texas Instruments is a 16-bit delta-sigma analog-to-digital converter with integrated programmable gain amplifier (PGA), 6-channel analog multiplexer, 2.5-V internal reference, 4.096-MHz oscillator, dual excitation current sources (10–2000 µA), and four GPIOs-designed for high-accuracy sensor signal acquisition in industrial temperature, pressure, and strain measurement systems.

For engineers reviewing the ADS114S06IPBS datasheet, ADS114S06IPBS pinout, ADS114S06IPBS application, or ADS114S06IPBS equivalent, key selection criteria include its 280 µA typical supply current, simultaneous 50/60-Hz rejection at ≤20 SPS, rail-to-rail input capability with PGA gain up to 128, and TQFP-32 package compatibility with industrial-grade –50°C to +125°C operation.

Technical Context

The ADS114S06IPBS implements a low-latency sinc3 digital filter and optional low-latency filter for real-time industrial control loops, supporting data rates from 2.5 SPS to 4 kSPS. Its PGA features eight discrete gain settings (1, 2, 4, 8, 16, 32, 64, 128) with offset drift as low as ±100 nV/°C and INL of ±15 ppmFSR at gain ≥16.

It integrates fault detection including PGA rail detection (±0.15 V from AVDD/AVSS), reference detection with dual thresholds, burnout current sources (0.2–10 µA), and supply monitors for AVDD, DVDD, and IOVDD-all configurable via SPI interface with optional CRC. The device supports both unipolar (2.7–5.25 V) and bipolar (±2.5 V) analog supplies.

Key Specifications

Pinout & Package

The ADS114S06IPBS is housed in a 32-pin TQFP package (PBS) with 5.0 mm × 5.0 mm body size and exposed thermal pad connected to AVSS. Pin functions are fully defined per TI SBAS815A Rev A.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar precision ADC applications.

Compared with ADS114S08IPBS, the ADS114S06IPBS reduces channel count and pin utilization while retaining identical performance per channel and footprint-ideal for cost-sensitive, space-constrained designs. Against ADS124S06IPBS, it trades 8-bit resolution for 20% lower power and simpler digital interface timing, favoring industrial sensor transmitters over metrology-grade equipment.

Availability

ADS114S06IPBS is available at Aetrix Electronics and suitable for industrial temperature transmitters, PLC analog input modules, and battery-powered strain gauge data loggers requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for ADS114S06IPBS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in precision data converters and industrial signal chains.

The ADS114S0x family was designed specifically for high-integration, low-power industrial sensor front-ends-targeting applications where board space, power budget, and system-level component count are critical constraints.

FAQ

What is the maximum achievable data rate for ADS114S06IPBS with simultaneous 50-Hz and 60-Hz rejection?

The ADS114S06IPBS guarantees simultaneous 50-Hz and 60-Hz rejection only at data rates ≤20 SPS when using either the sinc3 or low-latency digital filter. At 20 SPS, NMRR reaches 79 dB (low-latency) or 88 dB (sinc3) with internal clock; higher data rates sacrifice line-frequency rejection capability. This specification is verified per TI SBAS815A Section 7.5.

Does ADS114S06IPBS support external reference inputs, and what are the voltage range limits?

Yes, ADS114S06IPBS supports two differential external reference inputs: REFP0/REFN0 and REFP1/REFN1. The valid differential reference voltage range is 0.5 V to (AVDD – AVSS), with absolute input limits referenced to AVSS. For example, with AVDD = 5.25 V and AVSS = 0 V, REFP0 may range from 0.5 V to 5.3 V, and REFN0 from –0.05 V to 4.75 V when reference buffers are enabled.

How many general-purpose I/Os does ADS114S06IPBS provide, and what logic levels do they use?

The ADS114S06IPBS provides four general-purpose I/Os (GPIO0–GPIO3) on pins 19–22. These pins operate at AVDD-referenced logic levels: VIH ≥ 0.7 × AVDD and VIL ≤ 0.3 × AVDD, with VOL ≤ 0.2 × AVDD at 1 mA sink. They are not 5-V tolerant and must be driven within the analog supply domain, as specified in Section 7.5 of the ADS114S06IPBS datasheet.

Can ADS114S06IPBS perform self-calibration, and how is it initiated?

Yes, ADS114S06IPBS supports both self-offset calibration and system-gain calibration. Self-offset calibration is initiated by writing 0x80 to register 0x01 (STATUS register) via SPI, which triggers an internal sequence that measures and stores offset correction values. System-gain calibration requires applying a known reference voltage to AINP/AINN and executing the same command-both operations complete in under 100 ms and are detailed in Section 9.5 of SBAS815A.

What is the thermal resistance (RθJA) of ADS114S06IPBS in its TQFP-32 (PBS) package?

The ADS114S06IPBS in the TQFP-32 (PBS) package has a junction-to-ambient thermal resistance (RθJA) of 75.5°C/W, as measured per JEDEC JESD51-2 standard with 2-layer board construction. This value assumes standard copper pour and no additional heatsinking; actual thermal performance improves with internal thermal vias to AVSS planes and proper PCB layout per Section 12 of the datasheet.