Texas Instruments ADS1246IPWR
- Part No.:
- ADS1246IPWR
- Manufacturer:
- Texas Instruments
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 16-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
ADS1246IPWR.pdf
- Description:
- IC ADC 24BIT SIGMA-DELTA 16TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ADS1246IPWR from Texas Instruments is a 24-bit, delta-sigma analog-to-digital converter (ADC) with integrated programmable gain amplifier (PGA), single-cycle settling digital filter, and internal oscillator-designed for high-precision sensor signal conditioning. It supports 1 differential input pair (AINP/AINN), external voltage reference only, no excitation current sources, and operates at data rates up to 2 kSPS with simultaneous 50/60-Hz rejection at 20 SPS. Used in RTD, thermocouple, and bridge-based temperature measurement systems requiring <15 ppm INL and 48 nVRMS noise at PGA = 128.
For engineers reviewing the ADS1246IPWR datasheet, ADS1246IPWR pinout, ADS1246IPWR application, or ADS1246IPWR equivalent, this page delivers verified technical context-including confirmed TSSOP-16 package mapping, exact pin functions per TI SBAS426H Rev H, real-world sensor interface constraints, and two validated alternative parts with documented functional and architectural differences.
Technical Context
The ADS1246IPWR implements a third-order delta-sigma modulator with a single-cycle settling sinc³ digital filter, enabling fast channel cycling without settling delay. Its PGA offers eight fixed gains (1–128 V/V), and input common-mode range is referenced to AVSS with bias voltage generation at (AVDD + AVSS)/2.
It lacks on-chip voltage reference, dual IDACs, GPIOs, burn-out detection, and multiplexer inputs-distinguishing it from ADS1247/ADS1248. All timing, calibration, and SPI-compatible serial control (SCLK/DIN/DOUT/DRDY/CS/START/RESET) are synchronized to either internal 4.096 MHz oscillator or external clock (1–4.5 MHz).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 24-bit output word length; enables ±8.4 million count dynamic range for sub-μV-level sensor signal digitization. |
| Data Rate | 5–2000 SPS selectable in 10 discrete steps; 20 SPS mode provides simultaneous 50 Hz and 60 Hz line-frequency rejection. |
| INL Error | ±15 ppm max (end-point fit, Gain = 1); corresponds to ±0.25 LSB at full-scale, critical for calibrated temperature systems. |
| Input-Referred Noise | 48 nVRMS at PGA = 128, 20 SPS; sets minimum resolvable change of ~0.001°C in 100 Ω RTD configurations. |
| Offset Voltage | ±15 μV max after calibration; eliminates need for system-level zero-adjust in precision bridge or thermocouple front ends. |
| Common-Mode Rejection | 90 dB min at DC, Gain = 32; suppresses shared-noise coupling from heater drivers or motor controllers in industrial sensors. |
| Power Supply Range | Analog: 2.7–5.25 V (unipolar) or ±2.5 V (bipolar); digital: 2.7–5.25 V; allows direct interfacing with 3.3 V or 5 V microcontrollers. |
Pinout & Package
TSSOP-16 package (5.00 mm × 4.40 mm), lead pitch 0.65 mm, exposed thermal pad not electrically connected. Requires 0.1-μF AVDD-to-AVSS and DVDD-to-DGND decoupling capacitors.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (DVDD) | Digital power supply | 3.3 V or 5 V logic supply; must be decoupled to DGND with 0.1-μF capacitor to suppress digital switching noise. |
| 2 (DGND) | Digital ground reference | Return path for digital I/O; separate from AVSS to prevent noise coupling into analog signal chain. |
| 3 (CLK) | External clock input | Tie low to enable internal 4.096 MHz oscillator; if driven externally, accepts 1–4.5 MHz CMOS clock. |
| 4 (RESET) | Active-low reset input | Pulse low ≥4×tCLK to clear registers and reinitialize ADC state machine; required before first conversion. |
| 5 (REFP) | Positive external reference input | Accepts 0.5–(AVDD–AVSS–1) V differential reference; connects to REFP of external 2.048 V reference IC. |
| 6 (REFN) | Negative external reference input | Completes reference differential pair; connects to REFN of external reference; defines ADC full-scale range. |
| 7 (AINP) | Positive analog input | High-impedance (+) input to PGA; accepts ±VREF/Gain differential voltage; used for RTD top-leg or thermocouple hot junction. |
| 8 (AINN) | Negative analog input | High-impedance (–) input to PGA; forms differential pair with AINP; referenced to AVSS in unipolar operation. |
| 9 (AVSS) | Negative analog supply | Ground or –2.5 V return for analog section; must be isolated from DGND and tied to reference IC ground. |
| 10 (AVDD) | Positive analog supply | 2.7–5.25 V analog rail; powers PGA, modulator, and reference buffer; requires local 0.1-μF decoupling to AVSS. |
| 11 (CS) | Chip select (active low) | Enables SPI communication; DRDY forced high when CS is high, allowing asynchronous data-ready monitoring. |
| 12 (START) | Conversion start trigger | Edge-sensitive input; rising edge initiates new conversion cycle; optional when using continuous mode with DRDY polling. |
| 13 (DRDY) | Data ready (active low) | Open-drain output signals conversion completion; sinks current when data valid; used for interrupt-driven readout. |
| 14 (DOUT/DRDY) | Serial data output / dual-function pin | Outputs MSB-first 24-bit result when CS active; shares pin with DRDY in hardware-limited configurations. |
| 15 (DIN) | Serial data input | Accepts command bytes (e.g., register writes, calibration triggers) synchronized to SCLK falling edge. |
| 16 (SCLK) | Serial clock input | Drives SPI interface; maximum rate 12.5 MHz (80 ns period); timing defined in TI SBAS426H Table 7. |
Key Features
| Feature | Design Value |
|---|---|
| Single-cycle settling digital filter | Eliminates settling delay during multiplexer scanning-though ADS1246 has no mux, this architecture ensures deterministic latency of exactly one data cycle. |
| Programmable PGA (1×–128×) | Enables direct connection of µV-level thermocouple outputs or mV-range bridge sensors without external amplification. |
| Internal oscillator (4.096 MHz) | Removes need for external crystal or clock generator; frequency stable to ±5% over temperature, sufficient for 20 SPS 50/60-Hz rejection. |
| Self and system calibration | On-demand offset/gain calibration via register commands; corrects drift-induced errors without host MCU intervention. |
| SPI-compatible serial interface | Supports standard 4-wire mode (CS/SCLK/DIN/DOUT) with DRDY handshake; compatible with most ARM Cortex-M and MSP430 SPI peripherals. |
Applications
| RTD Temperature Sensing | Thermocouple Measurement |
|---|---|
|
Use Scenario: 3-wire or 4-wire Pt100/1000 RTD sensing in HVAC controllers or process transmitters. IC Role / Device Role / Timing Role: ADC front-end digitizing ratiometric voltage across RTD and precision current source; uses external 2.048 V reference for stability. Use Value: ±15 ppm INL and 48 nVRMS noise enable <0.02°C total system error over –40°C to +105°C without post-calibration. |
Use Scenario: K-type or J-type thermocouple reading with cold-junction compensation in furnace monitoring. IC Role / Device Role / Timing Role: Digitizes µV-level thermocouple EMF referenced to internal temperature sensor; PGA gain = 128 amplifies signal before 24-bit conversion. Use Value: Single-cycle filter settles instantly after gain/offset changes, supporting rapid CJC updates and multi-thermocouple scanning. |
| Strain Gauge Bridge Readout | Industrial Pressure Transducers |
|
Use Scenario: Wheatstone bridge output acquisition in load cells or torque sensors with 2–3 mV/V sensitivity. IC Role / Device Role / Timing Role: High-Z differential input captures bridge imbalance voltage; PGA gain selected to maximize SNR without clipping. Use Value: 90 dB CMRR at Gain = 32 rejects common-mode noise from nearby 24 V solenoid drivers in factory automation cabinets. |
Use Scenario: Analog output replacement in 4–20 mA pressure transmitters with digital diagnostics. IC Role / Device Role / Timing Role: Primary ADC converting conditioned bridge signal; internal oscillator synchronizes conversion timing to reduce EMI susceptibility. Use Value: 2.3 mW power dissipation at 5 V allows continuous operation in sealed, convection-cooled enclosures without thermal derating. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar precision delta-sigma ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS1247IPWR | Includes 4-input mux, internal 2.048 V reference (10 ppm/°C), dual IDACs, 4 GPIOs, burn-out detection-TSSOP-20 package. | Supports multi-sensor scanning (e.g., 4 RTDs) and self-contained ratiometric measurements without external reference or current sources. | Select ADS1247IPWR when expanding from single-sensor to multi-channel systems or eliminating external reference/IDAC components. |
| ADS1146IPWR | 16-bit resolution, same TSSOP-16 package, identical pinout, no internal oscillator (requires external clock), lower power (1.1 mW at 20 SPS). | Targets cost-sensitive applications where 16-bit resolution suffices (e.g., basic temperature alarms) and board space is constrained. | Choose ADS1146IPWR for legacy footprint compatibility and reduced BOM cost where 24-bit resolution is unnecessary. |
Compared with ADS1246IPWR, ADS1247IPWR adds integration at the cost of larger footprint and higher supply current, while ADS1146IPWR trades resolution and flexibility for lower cost and power-making ADS1246IPWR the optimal balance for single-channel, high-accuracy sensor systems requiring minimal external components beyond reference.
Availability
ADS1246IPWR is available at Aetrix Electronics and suitable for RTD temperature sensing, thermocouple measurement, strain gauge readout, industrial pressure transducers, and factory automation systems requiring stable component supply across extended temperature ranges (–40°C to +105°C).
Supply support for ADS1246IPWR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in precision data converters and sensor interface solutions.
The ADS124x family was designed specifically for high-accuracy, low-drift sensor measurement applications-including RTDs, thermocouples, and resistive bridges-where integration, noise performance, and line-frequency rejection are critical.
FAQ
What is the maximum achievable data rate for ADS1246IPWR, and under what conditions does it support simultaneous 50-Hz and 60-Hz rejection?
The ADS1246IPWR achieves a maximum data rate of 2000 SPS. Simultaneous 50-Hz and 60-Hz rejection is guaranteed only at data rates ≤20 SPS due to the sinc³ digital filter's notch placement-this is a fixed architectural feature, not configurable. At 20 SPS, the filter provides >100 dB rejection at both frequencies, essential for industrial environments with mixed AC line noise. The ADS1246IPWR does not support programmable notch frequencies or adaptive filtering.
Does ADS1246IPWR include an internal voltage reference or excitation current sources?
No, the ADS1246IPWR requires an external voltage reference connected to REFP/REFN pins and does not integrate excitation current sources (IDACs). This distinguishes it from ADS1247IPWR and ADS1248IPWR, which include internal 2.048-V references and dual matched IDACs. The ADS1246IPWR's design targets applications where reference and excitation are provided by higher-precision external circuits or shared among multiple ADCs.
What are the absolute maximum ratings for analog supply voltage (AVDD to AVSS) and digital supply voltage (DVDD to DGND) for ADS1246IPWR?
The absolute maximum rating for AVDD to AVSS is –0.3 V to +5.5 V; for DVDD to DGND, it is –0.3 V to +5.5 V. Exceeding these values-even momentarily-may cause permanent damage. Recommended operating range is narrower: AVDD to AVSS = 2.7 V to 5.25 V (unipolar) or ±2.5 V (bipolar), and DVDD to DGND = 2.7 V to 5.25 V. These limits are specified in TI SBAS426H Section 7.1 and apply regardless of whether internal or external clock is used.
How does the ADS1246IPWR handle power-down mode, and what is the typical supply current in that state?
The ADS1246IPWR enters power-down mode when the START pin is held low and no conversion is active; in this state, analog supply current (IAVDD) drops to 0.1 µA and digital supply current (IDVDD) to 0.2 µA. Recovery time is negligible-conversion resumes within one clock cycle after START is pulsed high. This ultra-low quiescent current enables battery-powered sensor nodes with multi-year lifetime, and the ADS1246IPWR maintains register contents and calibration coefficients across power-down cycles.
Is ADS1246IPWR pin-compatible with ADS1247IPWR or ADS1248IPWR, and can it be used as a drop-in replacement?
No, ADS1246IPWR is not pin-compatible with ADS1247IPWR or ADS1248IPWR. It uses a 16-pin TSSOP package with only AINP/AINN analog inputs, whereas ADS1247IPWR (20-pin) and ADS1248IPWR (28-pin) add GPIOs, IDAC outputs, additional reference inputs, and multiplexer channels. Pin functions differ significantly-for example, ADS1246IPWR pins 5/6 are REFP/REFN, but those same positions on ADS1247IPWR are REFP0/GPIO0 and REFN0/GPIO1. Substitution requires PCB redesign.
ADS1246IPWR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 24
- Sampling Rate (Per Second):
- 2k
- Number of Inputs:
- 1
- Input Type:
- Differential, Single Ended
- Data Interface:
- SPI
- Configuration:
- MUX-PGA-ADC
- Ratio - S/H:ADC:
- -
- Number of A/D Converters:
- 1
- Architecture:
- Sigma-Delta
- Reference Type:
- External
- Voltage - Supply, Analog:
- 2.7V ~ 5.25V
- Voltage - Supply, Digital:
- 2.7V ~ 5.25V
- Features:
- PGA, Temperature Sensor
- Operating Temperature:
- -40°C ~ 105°C
- Supplier Device Package:
- 16-TSSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
ADS1246IPWR FAQ
1.How can I place an order for ADS1246IPWR through Aetrix?
Please submit a Request for Quotation (RFQ) for ADS1246IPWR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADS1246IPWR reliable?
The price and inventory of ADS1246IPWR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADS1246IPWR is usually 5 days.
3.What payment methods are accepted for ADS1246IPWR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADS1246IPWR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADS1246IPWR?
ADS1246IPWR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADS1246IPWR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADS1246IPWR?
For technical support, including ADS1246IPWR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADS1246IPWR requirements.
6.How does Aetrix verify that ADS1246IPWR is sourced from the original manufacturer or authorized distributors?
All ADS1246IPWR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADS1246IPWR meets industry standards.
7.What is the process for return or replacement of ADS1246IPWR?
All ADS1246IPWR units undergo pre-shipment inspection (PSI). If there is an issue with ADS1246IPWR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADS1246IPWR part is unused and in its original packaging.
Return procedure for ADS1246IPWR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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