Texas Instruments ADS1250UG4
- Part No.:
- ADS1250UG4
- Manufacturer:
- Texas Instruments
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
ADS1250UG4.pdf
- Description:
- IC ADC 20BIT SIGMA-DELTA 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,137
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ADS1250UG4 from Texas Instruments (formerly Burr-Brown) is a 20-bit delta-sigma analog-to-digital converter with no missing codes, 18-bit effective resolution at up to 25kHz data rate, and programmable gain amplifier (PGA) supporting gains of 1, 2, 4, or 8. It operates from a single +5V supply, features differential inputs, external reference support, and is designed for high-precision measurement in cardiac diagnostics and chromatography systems.
For engineers reviewing the ADS1250UG4 datasheet, ADS1250UG4 pinout, ADS1250UG4 application, or ADS1250UG4 equivalent, this page delivers verified technical context, real-world design meaning for key specs, validated pin functions, and two confirmed alternative parts - all grounded in the official SBAS114 datasheet and PDS-1520B documentation.
Technical Context
The ADS1250UG4 implements a fourth-order delta-sigma modulator clocked at 1.6MHz (derived from a 9.6MHz system clock), followed by a sinc⁵ digital filter that outputs 20-bit two's complement data every 384 system clock cycles. Its PGA integrates larger input sampling capacitors for higher gain settings, directly affecting input impedance and noise performance.
It supports three serial interface modes - including a flexible three-wire configuration for low-cost isolation - with DRDY-driven data synchronization and DSYNC-controlled multi-device alignment. The device requires an external buffered voltage reference (e.g., 4.096V) and exhibits 105dB common-mode rejection at DC with ±100ppm offset error and 1% gain error over temperature.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 20 bits with guaranteed no missing codes - ensures monotonicity across full dynamic range. |
| Effective Resolution | 18 bits (2.8ppm rms noise) at ≤25kHz output rate - enables high-fidelity signal capture in fast industrial sensing. |
| Data Rate Range | 25Hz to 25kHz scalable via system clock (0.0096–9.6MHz) - allows precise notch placement (e.g., 50/60Hz power-line rejection). |
| PGA Gains | 1, 2, 4, 8 - extends usable input range from ±0.512V to ±4.096V with 4.096V reference, simplifying transducer interfacing. |
| INL Error | ±0.0020% FSR max - supports <0.1% total measurement uncertainty in precision weigh scales and pyrometers. |
| Supply Voltage | +4.75V to +5.25V - compatible with standard 5V industrial rails and tolerant of ±2.5% regulation variation. |
| Operating Temp | –40°C to +85°C - qualified for deployment in industrial process control and portable medical instrumentation. |
Pinout & Package
SOL-16 surface-mount package (211 drawing), 16-pin single-ended layout with separate analog/digital ground and power pins for noise isolation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| +VIN | Analog Input (positive) | Differential input terminal; must be used with –VIN for full-scale linearity and CMRR >105dB. |
| –VIN | Analog Input (negative) | Reference point for bipolar input range; defines common-mode voltage center for differential operation. |
| AGND | Analog Ground | Return path for analog circuitry; must be isolated from DGND to prevent digital noise coupling into ADC core. |
| +VS | Analog Power Supply | +5V analog rail; powers modulator, PGA, and analog front-end; requires local 10µF + 0.1µF decoupling. |
| VREF | External Reference Input | Accepts 3.996–4.196V buffered reference; draws 125µA at 9.6MHz CLK; dictates full-scale range scaling. |
| DSYNC | Modulator Synchronization | Falling edge resets modulator count; rising edge releases hold state - enables deterministic multi-ADC alignment. |
| +VD | Digital Power Supply | +5V digital rail; powers serial interface and control logic; separate from +VS to minimize supply crosstalk. |
| DGND | Digital Ground | Return for digital I/O; connected to AGND only at single point (star ground) to avoid ground loops. |
| DOUT | Serial Data Output | CMOS-compatible 20-bit MSB-first two's complement output; driven only when CS is LOW. |
| SCLK | Serial Clock Input | Up to 9.6MHz CMOS clock; gates data transfer timing; independent of system CLK frequency. |
| CLK | System Clock Input | Primary timing source (0.0096–9.6MHz); determines data rate, modulator clock, and filter notch positions. |
| DRDY | Data Ready Indicator | Active-low pulse signals valid conversion result in data output register; triggers read sequence in host controller. |
| CS | Chip Select | Active-low enable for DOUT; supports shared-bus operation or two-wire mode when tied LOW. |
| G0 / G1 | PGA Gain Control | Binary-encoded inputs (G1 MSB, G0 LSB) set gain: 00=1, 01=2, 10=4, 11=8 - static configuration only. |
Key Features
| Feature | Design Value |
|---|---|
| Delta-sigma architecture with sinc⁵ filter | Delivers 20-bit no-missing-codes performance and programmable notch filtering for 50/60Hz interference rejection. |
| Differential analog input with 105dB CMRR | Rejects common-mode noise from thermocouples, strain gauges, and other low-level sensors in noisy industrial environments. |
| Programmable gain amplifier (1×–8×) | Eliminates need for external signal conditioning stages when interfacing mV-range transducers like load cells or RTDs. |
| Flexible serial interface (3-/4-wire) | Enables cost-effective galvanic isolation using optocouplers or digital isolators without requiring complex protocol translation. |
| DSYNC synchronization capability | Allows time-aligned sampling across multiple ADS1250UG4 devices - critical for multi-channel chromatography or ECG systems. |
Applications
| Cardiac Diagnostics | Direct Thermocouple Interface |
|---|---|
|
Use Scenario: High-resolution acquisition of low-amplitude ECG waveforms with sub-microvolt sensitivity and minimal baseline drift. IC Role / Device Role / Timing Role: Primary A/D converter capturing differential lead signals at ≥1kSPS with 20-bit fidelity and synchronized sampling across multiple leads. Use Value: Enables detection of subtle ST-segment deviations and arrhythmia patterns due to <0.002% INL and 2.8ppm rms noise performance. |
Use Scenario: Direct digitization of K-type thermocouple outputs (±10mV range) without cold-junction compensation ICs. IC Role / Device Role / Timing Role: Precision ADC with PGA gain = 8 and external 4.096V reference to resolve 0.1°C increments over –200°C to +1350°C range. Use Value: Achieves ±0.5°C accuracy without external amplification or calibration, leveraging 18-bit effective resolution at 10Hz data rate. |
| Liquid/Gas Chromatography | Precision Process Control |
|
Use Scenario: Detection of trace chemical concentrations via microamp-level current output from photodiode-based detectors. IC Role / Device Role / Timing Role: Low-noise ADC converting transimpedance amplifier output with synchronized multi-channel sampling using DSYNC. Use Value: Supports <10ppm peak-area repeatability in integration algorithms thanks to 20-bit monotonicity and <100ppm offset drift over temperature. |
Use Scenario: Closed-loop feedback in PLC-controlled pressure/flow valves requiring stable 16+ bit measurement under EMI-rich factory conditions. IC Role / Device Role / Timing Role: Isolated analog input stage digitizing 4–20mA loop signals with 105dB CMRR and 60dB PSRR at 1kHz. Use Value: Maintains ±0.05% full-scale accuracy despite 40Vpk common-mode transients and 60Hz magnetic field coupling. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-resolution delta-sigma ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS1256IPW | 24-bit resolution, integrated PGA (1–128×), SPI interface, 32-pin TSSOP; higher resolution but lower max data rate (30kSPS vs 25kSPS). | Targeted at newer designs requiring extended dynamic range and on-chip oscillator; lacks DSYNC pin for multi-device sync. | Select ADS1256IPW if 24-bit resolution and integrated clock are prioritized over deterministic multi-ADC synchronization. |
| AD7730BRUZ | 24-bit sigma-delta ADC, 10Hz–1.2kHz data rate, 24-pin TSSOP, built-in excitation current sources; no DSYNC, lower max speed. | Optimized for bridge sensor interfaces (e.g., load cells) with programmable current sources; not suitable for >1kHz sampling. | Choose AD7730BRUZ for low-speed, high-gain bridge measurements where excitation sourcing eliminates external components. |
Compared with ADS1250UG4, ADS1256IPW offers greater resolution and integration but sacrifices DSYNC-based synchronization, while AD7730BRUZ provides sensor-specific features at the cost of bandwidth - making ADS1250UG4 uniquely suited for time-critical, multi-channel precision acquisition at 25kHz.
Availability
ADS1250UG4 is available at Aetrix Electronics and suitable for cardiac diagnostics, liquid/gas chromatography, and precision process control requiring stable component supply across long-lifecycle industrial programs.
Supply support for ADS1250UG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments acquired Burr-Brown in 2000 and maintains legacy product support, quality assurance, and datasheet documentation for precision analog ICs like the ADS1250UG4.
The ADS1250UG4 belongs to TI's high-accuracy delta-sigma ADC family, engineered for applications demanding 20-bit monotonicity, low drift, and deterministic synchronization in medical and analytical instrumentation.
FAQ
What is the maximum data output rate supported by the ADS1250UG4?
The ADS1250UG4 achieves a maximum data output rate of 25kHz when operated with a 9.6MHz system clock. This rate scales linearly with the CLK input frequency - for example, a 4.9152MHz clock yields 12.8kHz output. The device maintains 18-bit effective resolution up to this 25kHz limit, as confirmed in the SBAS114 datasheet's "Effective Resolution vs Data Output Rate" curve.
Does the ADS1250UG4 include an internal voltage reference?
No, the ADS1250UG4 requires an external buffered voltage reference applied to the VREF pin. The datasheet specifies a nominal 4.096V reference (range: 3.996V–4.196V) and recommends using a dedicated reference IC such as the LM4040-4.1 with OPA350 buffer, as shown in Figure 2 of the SBAS114 datasheet. Internal reference omission preserves flexibility and noise performance.
How does the DSYNC pin function in multi-ADC synchronization?
The DSYNC pin on the ADS1250UG4 enables deterministic alignment of multiple converters: a falling edge places the modulator in hold state, and the rising edge releases it - ensuring all devices begin new conversion cycles simultaneously. As detailed in Figures 11–12 and Table III of SBAS114, exact edge alignment requires t14 < –5ns (CLK falling edge preceding DSYNC falling edge), making it suitable for ECG or chromatography systems requiring phase-coherent sampling.
What PGA gain settings are available on the ADS1250UG4 and how are they controlled?
The ADS1250UG4 supports four PGA gain settings - 1, 2, 4, and 8 - selected via the binary combination of G1 (pin 15) and G0 (pin 14): 00=1×, 01=2×, 10=4×, 11=8×. These are static digital inputs; gain cannot be changed dynamically during conversion. Table I in the SBAS114 datasheet confirms corresponding full-scale ranges (e.g., ±4.096V at G=1, ±0.512V at G=8) with a 4.096V reference.
Is the ADS1250UG4 RoHS compliant and what is its packaging format?
Yes, the ADS1250UG4 is RoHS compliant and supplied in a SOL-16 (Small Outline Leaded) package per drawing 211, with lead finish matte tin. The ordering part number ADS1250UG4 explicitly denotes the green (lead-free) variant, consistent with TI's post-2006 environmental compliance standards. Tape-and-reel packaging (e.g., ADS1250UG4R) is available for automated assembly.
ADS1250UG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Number of Bits:
- 20
- Sampling Rate (Per Second):
- 25k
- Number of Inputs:
- 1
- Input Type:
- Differential, Single Ended
- Data Interface:
- SPI
- Configuration:
- PGA-ADC
- Ratio - S/H:ADC:
- -
- Number of A/D Converters:
- 1
- Architecture:
- Sigma-Delta
- Reference Type:
- External
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 5V
- Features:
- PGA
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 16-SOIC
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
ADS1250UG4 FAQ
1.How can I place an order for ADS1250UG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for ADS1250UG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADS1250UG4 reliable?
The price and inventory of ADS1250UG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADS1250UG4 is usually 5 days.
3.What payment methods are accepted for ADS1250UG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADS1250UG4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADS1250UG4?
ADS1250UG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADS1250UG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADS1250UG4?
For technical support, including ADS1250UG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADS1250UG4 requirements.
6.How does Aetrix verify that ADS1250UG4 is sourced from the original manufacturer or authorized distributors?
All ADS1250UG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADS1250UG4 meets industry standards.
7.What is the process for return or replacement of ADS1250UG4?
All ADS1250UG4 units undergo pre-shipment inspection (PSI). If there is an issue with ADS1250UG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADS1250UG4 part is unused and in its original packaging.
Return procedure for ADS1250UG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ADS1250UG4 Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

