Texas Instruments ADS1253E

Overview

ADS1253E from Texas Instruments is a 24-bit delta-sigma analog-to-digital converter (ADC) with 19-bit effective resolution at up to 20.8kHz data rate, ±15ppm INL, 1.8ppm rms noise, and four differential input channels. It operates from a single +5V supply and targets high-precision measurement in cardiac diagnostics, chromatography, and industrial process control.

For engineers reviewing the ADS1253E datasheet, ADS1253E pinout, ADS1253E application, or ADS1253E equivalent, key selection considerations include its SSOP-16 package, 4-channel differential multiplexing, external reference support (0.5V–4.096V), synchronous serial interface, and power-down mode enabling <1µA quiescent current.

Technical Context

The ADS1253E implements a 4th-order delta-sigma modulator with fixed 64× oversampling ratio and a Sinc5 digital filter delivering notch rejection at integer multiples of the data rate. Its system clock (CLK) directly determines output rate - e.g., 8MHz CLK yields 20.8kHz output with 4.24kHz –3dB bandwidth.

Channel selection uses two Schmitt-trigger digital inputs (CHSEL0/CHSEL1) to route among four fully differential analog inputs; internal logic resets conversion on channel change, requiring five full conversions for settling. The DOUT/DRDY pin serves dual function: indicating data readiness (DRDY) and serially shifting out 24-bit offset-binary two's complement data (DOUT).

Key Specifications

Pinout & Package

ADS1253E is housed in a 16-pin SSOP (Shrink Small Outline Package) with 0.635mm pitch, optimized for compact PCB layouts and thermal performance in industrial environments.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-resolution delta-sigma ADC applications.

Compared with ADS1254IPW, the ADS1253E offers simpler single-supply design but less supply-domain isolation; versus AD7730BRUZ, it delivers 17× higher data rate and true 4-channel multiplexing at the cost of no integrated PGA or reference.

Availability

ADS1253E is available at Aetrix Electronics and suitable for cardiac diagnostics equipment, liquid/gas chromatography analyzers, and precision industrial process controllers requiring stable component supply across multi-year production cycles.

Supply support for ADS1253E includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in precision data converters and industrial signal chains.

The ADS1253E belongs to TI's precision delta-sigma ADC family designed specifically for high-resolution, low-noise measurement in medical, analytical, and industrial instrumentation where missing codes and long-term drift are unacceptable.

FAQ

What is the maximum data rate supported by the ADS1253E?

The ADS1253E achieves a maximum data rate of 20.8kHz when operated with an 8MHz system clock (CLK). This rate scales linearly with CLK frequency - for example, a 3.84MHz CLK yields 10kHz output. The device maintains 19-bit effective resolution up to this maximum rate, confirmed by rms noise of 1.8ppm at 20.8kHz per the SBAS199B datasheet.

Does the ADS1253E include an internal voltage reference?

No, the ADS1253E requires an external voltage reference applied to the VREF pin, supporting 0.5V to 4.096V. It draws 32µA from VREF at 8MHz CLK, and reference current scales proportionally with clock frequency. A buffered reference (e.g., REF3040 with OPA350) is recommended to maintain low noise and stability, as specified in Figure 2 of the ADS1253E datasheet.

How does the ADS1253E handle channel selection and settling time?

The ADS1253E uses CHSEL0 and CHSEL1 pins to select among its four differential input channels. Upon detecting a change on these inputs, internal logic resets the conversion pipeline, requiring five full conversions (1920 CLK cycles at 8MHz) for complete digital filter settling. Valid data appears on DOUT/DRDY after this interval, as detailed in Table I and the "Input Multiplexer" section of SBAS199B.

What serial interface protocol does the ADS1253E use?

The ADS1253E employs a 2-wire synchronous serial interface: SCLK controls data shift timing, and DOUT/DRDY serves dual roles - pulsing LOW to indicate valid data (DRDY mode) and shifting out 24-bit offset-binary two's complement results MSB-first on falling SCLK edges (DOUT mode). No external framing or start bits are required, and timing is fully defined in Table III of the datasheet.

Can the ADS1253E be synchronized with other converters for simultaneous sampling?

Yes, the ADS1253E supports synchronization by holding SCLK HIGH for 4–20 consecutive DOUT/DRDY cycles, which places all devices in modulator reset. Release occurs on the falling edge of SCLK, ensuring aligned sampling across multiple ADS1253E units. This capability is explicitly documented in the "Synchronizing Multiple Converters" section of SBAS199B and requires simultaneous SCLK edge transitions across all devices.