Texas Instruments ADS1259IPW
- Part No.:
- ADS1259IPW
- Manufacturer:
- Texas Instruments
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 20-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
ADS1259IPW.pdf
- Description:
- IC ADC 24BIT SIGMA-DELTA 20TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:144
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Product details
Overview
ADS1259IPW from Texas Instruments is a 24-bit, delta-sigma analog-to-digital converter with integrated 2.5V low-drift reference, programmable digital filter (sinc1/sinc2), and SPI-compatible interface. It delivers 0.4ppm INL, 0.05μV/°C offset drift, and 2ppm/°C reference drift across –40°C to +105°C, enabling high-accuracy measurements in industrial process control systems with ±2.5V analog supplies.
For engineers reviewing the ADS1259IPW datasheet, ADS1259IPW pinout, ADS1259IPW application, or ADS1259IPW equivalent, key selection considerations include its single-cycle settling mode, simultaneous 50/60Hz rejection at 10SPS, out-of-range detection flagging, internal oscillator option, and TSSOP-20 package compatibility with precision sensor signal chains.
Technical Context
The ADS1259IPW employs a fourth-order, inherently stable ΔΣ modulator with 2+2 pipelined architecture, shifting quantization noise beyond the passband for effective digital filtering. Its fifth-order sinc filter plus programmable averager supports data rates from 10SPS to 14.4kSPS with selectable sinc1 (single-cycle settling) or sinc2 (enhanced noise rejection) modes.
It integrates an LDO powering the digital core from DVDD, a buffered 2.5V reference capable of ±10mA drive, and fast out-of-range detection that latches at ±105% FSR. Clocking options include internal oscillator (±0.2% accuracy), external crystal (0.1–8MHz), or external clock with 40–60% duty cycle.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 24-bit with no missing codes - guarantees monotonicity and full dynamic range utilization in precision measurement. |
| Data Rate Range | 10 SPS to 14.4 kSPS - enables trade-off between noise performance (0.45μVRMS at 10SPS) and throughput. |
| INL Error | ±0.4 ppm - ensures sub-1-LSB linearity error over full temperature range (–40°C to +105°C). |
| Reference Drift | 2 ppm/°C - maintains absolute accuracy without external calibration in wide-temperature industrial environments. |
| Offset Drift | 0.05 μV/°C - minimizes zero-point drift in long-duration, high-gain sensor applications. |
| Power Dissipation | 13 mW operating / 10 μW power-down - supports low-power operation while retaining fast wake-up capability. |
| Supply Range | Analog: ±2.5V or +5V; Digital: +2.7V to +5.25V - accommodates both bipolar sensor interfaces and standard logic-level microcontrollers. |
Pinout & Package
TSSOP-20 package with 0.65mm pitch, thermally enhanced for industrial ambient operation up to +105°C junction temperature.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AINP / AINN | Differential analog input | Accepts true bipolar signals up to ±VREF; 120kΩ differential impedance supports direct connection to strain gauges or RTDs. |
| VREFP / VREFN | Reference voltage inputs | Supports external reference or internal 2.5V REFOUT; buffered inputs reduce loading on precision reference sources. |
| REFOUT | Internal reference output | Provides 2.5V ±0.4% output capable of ±10mA drive - eliminates need for external reference in most configurations. |
| RESET/PWDN | Reset and power-down control | Active-low pin: momentary low resets device; sustained low enters ultra-low-power mode (<25μW). |
| START / DRDY | Conversion trigger and status | START initiates conversion; DRDY active-low indicates valid data ready on DOUT for synchronous readout. |
| SCLK / DIN / DOUT / CS | SPI interface | 4-wire SPI-compatible interface (up to 4MHz) with checksum and redundant read for data integrity in noisy industrial settings. |
| XTAL1/CLKIN / XTAL2 | External clock interface | Supports crystal (0.1–8MHz) or external clock source; XTAL2 left unconnected when using external clock. |
| BYPASS | Digital core LDO output | Requires ≥0.1μF capacitor to DGND - stabilizes internal 1.8V digital supply independent of DVDD ripple. |
Key Features
| Feature | Design Value |
|---|---|
| Programmable sinc1/sinc2 digital filter | sinc1 enables single-cycle settling for rapid response; sinc2 provides enhanced 50/60Hz rejection and lower noise at reduced data rates. |
| Integrated 2.5V reference with 2ppm/°C drift | Eliminates external reference component count and associated drift/error sources in compact industrial modules. |
| Out-of-range detection with latched FLAG bit | Flags overvoltage events at ±105% FSR in real time and appends result to checksum byte - enables immediate fault handling without host polling. |
| On-command offset/gain calibration | Corrects system-level errors using internal references - achieves ±1μV offset error and <0.0002% gain error post-calibration. |
| Internal oscillator with ±0.2% accuracy | Removes crystal BOM cost and layout area while maintaining timing stability sufficient for 24-bit accuracy at 10–60SPS. |
Applications
| Industrial Process Control | Scientific Instrumentation |
|---|---|
Use Scenario: High-precision pressure and flow transmitters in chemical plants requiring long-term stability under thermal cycling. IC Role / Device Role / Timing Role: Primary ADC digitizing bridge sensor outputs with integrated reference and 0.05μV/°C offset drift compensation. Use Value: Maintains calibration integrity over 10+ years without field recalibration due to 2ppm/°C reference drift and on-chip gain/offset correction. | Use Scenario: Low-noise data acquisition in laboratory-grade multimeters and impedance analyzers. IC Role / Device Role / Timing Role: 24-bit front-end ADC with sinc2 filter mode for 60Hz rejection and 0.45μVRMS noise at 10SPS. Use Value: Achieves >23 ENOB at 10SPS, enabling resolution better than 1ppm of full scale for metrology-grade measurements. |
| Test and Measurement | High-Accuracy Sensor Signal Conditioning |
Use Scenario: Automated test equipment capturing transient sensor responses with minimal latency. IC Role / Device Role / Timing Role: ADC configured in sinc1 mode for single-cycle settling and deterministic 10–14.4kSPS throughput. Use Value: Enables real-time closed-loop control with guaranteed data readiness within one conversion period - no software wait states required. | Use Scenario: Strain gauge and load cell interfaces in structural health monitoring systems deployed outdoors. IC Role / Device Role / Timing Role: Precision ADC with ±2.5V analog supplies, 120kΩ input impedance, and robust ESD protection (HBM 2kV). Use Value: Direct interface to Wheatstone bridges without external amplification or level-shifting, reducing component count and thermal EMF errors. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-precision ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS1256IPW | 24-bit, 30kSPS, no integrated reference; requires external 2.5V reference and PGA. | Lacks on-chip reference and out-of-range detection; higher max data rate but greater system complexity. | Select when higher throughput (>14.4kSPS) is required and external reference/PGA are already present. |
| AD7730BRUZ | 24-bit, 1.2kSPS, integrated PGA, 10ppm/°C reference drift, SPI interface. | Lower data rate and higher reference drift; includes programmable gain but no sinc2 filter or single-cycle settling. | Select for low-speed, high-gain sensor interfaces where PGA integration outweighs reference stability requirements. |
Compared with ADS1256IPW and AD7730BRUZ, the ADS1259IPW uniquely combines integrated 2.5V reference (2ppm/°C), single-cycle settling, and simultaneous 50/60Hz rejection - making it optimal for space-constrained, thermally demanding industrial nodes needing self-contained precision.
Availability
ADS1259IPW is available at Aetrix Electronics and suitable for industrial process control, scientific instrumentation, test and measurement, and high-accuracy sensor signal conditioning requiring stable component supply across extended temperature ranges.
Supply support for ADS1259IPW includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company delivering analog and embedded processing solutions for industrial, automotive, and personal electronics markets.
The ADS1259IPW belongs to TI's precision delta-sigma ADC product line, designed specifically for high-stability, low-drift measurement systems in harsh industrial environments where long-term accuracy and minimal calibration overhead are critical.
FAQ
What is the maximum data rate supported by the ADS1259IPW?
The ADS1259IPW supports a maximum data rate of 14.4 kSPS in sinc1 mode. At this rate, typical RMS noise is 6.2 μVRMS with 19.6 ENOB. The device maintains 24-bit no-missing-codes resolution across all data rates from 10 SPS to 14.4 kSPS, and its digital filter can be configured for either sinc1 (fast settling) or sinc2 (enhanced noise rejection) operation depending on system requirements.
Does the ADS1259IPW require an external crystal to operate?
No, the ADS1259IPW does not require an external crystal. It includes an internal oscillator with ±0.2% accuracy at +25°C, sufficient for most high-precision applications at data rates down to 10SPS. External crystal (0.1–8MHz) or clock input are optional alternatives for tighter timing control or synchronization with system clocks - XTAL2 is left unconnected when using external clock mode.
How does the out-of-range detection work on the ADS1259IPW?
The ADS1259IPW out-of-range detection triggers when the differential input exceeds ±105% of full-scale range (±1.05 × VREF). The comparator output is latched and appended as the LSB of conversion data or bit 7 of the checksum byte. The latch resets automatically upon reading conversion data or initiating a new conversion, enabling real-time fault flagging without host intervention or additional GPIO resources.
What is the purpose of the BYPASS pin on the ADS1259IPW?
The BYPASS pin on the ADS1259IPW is the output of an internal LDO that powers the digital core at 1.8V. It must be decoupled with a minimum 0.1μF capacitor to DGND to stabilize the regulated supply. This architecture isolates the sensitive digital circuitry from DVDD noise, ensuring robust SPI communication and low-noise digital filtering performance even when DVDD has significant ripple or switching noise.
Can the ADS1259IPW operate with a single +5V analog supply?
Yes, the ADS1259IPW supports unipolar analog operation with AVDD = +5V and AVSS = DGND (0V), accepting unipolar or offset-bipolar input signals. It also supports true bipolar operation with AVDD = +2.5V and AVSS = –2.5V for differential inputs spanning ±2.5V. Both configurations maintain full 24-bit performance, and the internal 2.5V reference remains functional regardless of analog supply configuration.
ADS1259IPW Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 20-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 24
- Sampling Rate (Per Second):
- 14k
- Number of Inputs:
- 1
- Input Type:
- Differential, Single Ended
- Data Interface:
- SPI
- Configuration:
- ADC
- Ratio - S/H:ADC:
- -
- Number of A/D Converters:
- 1
- Architecture:
- Sigma-Delta
- Reference Type:
- External
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 2.7V ~ 5.25V
- Features:
- PGA
- Operating Temperature:
- -40°C ~ 105°C
- Supplier Device Package:
- 20-TSSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
ADS1259IPW FAQ
1.How can I place an order for ADS1259IPW through Aetrix?
Please submit a Request for Quotation (RFQ) for ADS1259IPW on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADS1259IPW reliable?
The price and inventory of ADS1259IPW are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADS1259IPW is usually 5 days.
3.What payment methods are accepted for ADS1259IPW?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADS1259IPW transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADS1259IPW?
ADS1259IPW orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADS1259IPW order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADS1259IPW?
For technical support, including ADS1259IPW datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADS1259IPW requirements.
6.How does Aetrix verify that ADS1259IPW is sourced from the original manufacturer or authorized distributors?
All ADS1259IPW products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADS1259IPW meets industry standards.
7.What is the process for return or replacement of ADS1259IPW?
All ADS1259IPW units undergo pre-shipment inspection (PSI). If there is an issue with ADS1259IPW, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADS1259IPW part is unused and in its original packaging.
Return procedure for ADS1259IPW:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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