Texas Instruments ADS130B02QPWRQ1
- Part No.:
- ADS130B02QPWRQ1
- Manufacturer:
- Texas Instruments
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 20-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
ADS130B02QPWRQ1.pdf
- Description:
- AUTOMOTIVE 16-BIT, 32-KSPS, TWO-
- Quantity:
- Payment:

- Shipping:

Inventory:5,537
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ADS130B02QPWRQ1 from Texas Instruments is an AEC-Q100 Grade 1 (–40°C to +125°C) automotive-qualified, 2-channel, simultaneous-sampling, 16-bit delta-sigma ADC with programmable gain up to 128, global-chop offset cancellation, and integrated 1.2-V low-drift reference - designed for precision current-shunt and voltage measurements in battery management systems.
For engineers reviewing the ADS130B02QPWRQ1 datasheet, ADS130B02QPWRQ1 pinout, ADS130B02QPWRQ1 application, or ADS130B02QPWRQ1 equivalent, key selection considerations include simultaneous dual-channel sampling integrity, crosstalk ≤ –120 dB, input-referred offset drift ≤ 30 nV/°C with global-chop enabled, and support for unipolar supply operation with negative input capability via integrated charge pump.
Technical Context
The ADS130B02QPWRQ1 implements two independent delta-sigma modulators with synchronized clocking and matched digital decimation filters, enabling true simultaneous sampling across both channels without inter-channel timing skew. Each channel features a programmable gain amplifier (PGA) with eight discrete gain settings (1–128) and configurable input multiplexer routing to AGND or internal test signals.
It integrates a precision 1.2-V bandgap reference with ≤40 ppm/°C drift over –40°C to +125°C, a factory-trimmed internal oscillator (8.192 MHz ±0.5%), and CRC protection on SPI data and register access. Power scaling across high-resolution (32 kSPS), low-power (16 kSPS), and very-low-power (8 kSPS) modes allows noise-performance vs. power tradeoffs without sacrificing channel synchronization.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 16-bit delta-sigma with 24-bit output word; effective resolution up to 16 bits at OSR = 1024, gain = 1, 4 kSPS. |
| Data Rate | Up to 32 kSPS per channel in high-resolution mode; supports simultaneous sampling with no inter-channel latency. |
| Input Crosstalk | –120 dB at 50/60 Hz; ensures isolated measurement integrity when monitoring shunt current and pack voltage concurrently. |
| Offset Drift | ≤30 nV/°C with global-chop enabled; eliminates calibration recalibration needs across automotive temperature range. |
| Supply Range | 2.7 V to 3.6 V for both AVDD and DVDD; supports single-rail 3.3-V system design with separate analog/digital ground planes. |
| Power Consumption | 3 mW total at 3.3 V, 32 kSPS, gain = 1; enables thermally constrained BMS module integration. |
| Input Voltage Range | Differential input up to ±1.2 V (gain = 1); absolute inputs down to AGND – 0.3 V via integrated negative charge pump. |
Pinout & Package
ADS130B02QPWRQ1 is housed in a 20-pin TSSOP package (6.50 mm × 4.40 mm), optimized for automotive PCB layouts with thermal pad exposure and compact footprint.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AIN0P / AIN0N | Differential analog input channel 0 | Direct connection to battery shunt resistor; supports bidirectional current sensing with high common-mode rejection. |
| AIN1P / AIN1N | Differential analog input channel 1 | Interface to high-voltage divider or thermistor network; independently configurable gain and filter settings. |
| AVDD / AGND | Analog power and ground | Must be decoupled with 1-µF capacitor; separates analog noise from digital domains to preserve SNR. |
| DVDD / DGND | Digital I/O power and ground | Independent 3.3-V rail; enables level-shifting compatibility with microcontrollers and isolation barriers. |
| SCLK / DIN / DOUT / CS | SPI serial interface | CPOL = 0, CPHA = 1 timing; supports daisy-chain or multi-device bus with individual chip select lines. |
| DRDY | Data-ready indicator | Active-low pulse signals valid conversion data ready for readout; synchronizes host MCU data capture. |
| SYNC/RESET | Multi-device sync or hard reset | Enables precise time-aligned sampling across multiple ADS130B02QPWRQ1 devices in distributed BMS nodes. |
| CAP | Charge-pump LDO output | Provides regulated bias for internal negative rail generation; requires 220-nF capacitor to DGND for stability. |
Key Features
| Feature | Design Value |
|---|---|
| Global-chop offset cancellation | Reduces input-referred offset drift to ≤30 nV/°C and long-term drift to 0.25 µV over 1000 hours at 85°C. |
| Integrated negative charge pump | Enables measurement of signals below AGND (down to AGND – 0.3 V) using only a unipolar 3.3-V supply. |
| High-impedance analog inputs | Input impedance ≥300 MΩ with global-chop enabled at OSR = 1024; minimizes loading error on high-Z sensor sources. |
| CRC-protected SPI interface | End-to-end cyclic redundancy check on register writes, data reads, and configuration memory to prevent corruption in noisy automotive environments. |
| AEC-Q100 Grade 1 qualification | Validated for continuous operation from –40°C to +125°C ambient; includes ESD robustness (HBM ±2 kV, CDM ±750 V). |
Applications
| Automotive Battery Management System (BMS) | EV DC Fast-Charging Station Metering |
|---|---|
|
Use Scenario: Real-time monitoring of cell-string current via shunt resistor and pack voltage via resistor divider in 48–800-V traction battery packs. IC Role / Device Role / Timing Role: Simultaneous dual-channel ADC capturing current and voltage with <100-ns inter-channel skew for accurate SOC/SOH calculation. Use Value: Enables ISO 6469-compliant safety-critical energy computation with <±0.1% gain error and <±200 µV offset error over full temperature range. |
Use Scenario: Precision energy metering in SAE J1772/IEC 62196-compliant EVSE units, measuring grid-side AC input and DC output simultaneously. IC Role / Device Role / Timing Role: Dual-channel acquisition of isolated current transformer outputs and shunt-based DC current for revenue-grade kWh calculation. Use Value: Meets IEC 62053-22 Class 0.2 accuracy requirements with 16-bit ENOB and –120 dB crosstalk preventing mutual interference. |
| Energy Storage System (ESS) Rack Monitoring | Automotive Onboard Charger (OBC) Feedback Loop |
|
Use Scenario: Distributed sensing across modular lithium-ion battery racks in stationary storage, requiring synchronized voltage/current per module. IC Role / Device Role / Timing Role: Local ADC node providing time-aligned samples to central controller via isolated SPI or CAN gateway. Use Value: Eliminates timestamp interpolation errors in state estimation algorithms by guaranteeing sub-microsecond channel alignment. |
Use Scenario: Closed-loop control of bidirectional AC/DC and DC/DC converters in integrated OBCs, measuring primary-side current and secondary-side voltage. IC Role / Device Role / Timing Role: High-speed feedback ADC feeding real-time PWM modulation engine with deterministic latency ≤10 µs. Use Value: Supports 100+ kHz switching frequencies with stable loop response due to 32-kSPS per-channel throughput and <1-µs group delay. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel simultaneous-sampling ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS131B02QPWRQ1 | Higher resolution (24-bit), higher power (6.5 mW), same package and pinout; includes enhanced diagnostics and watchdog timer. | Targeted at ASIL-B functional safety systems requiring diagnostic coverage; not required for basic BMS monitoring. | Select ADS131B02QPWRQ1 only if ISO 26262 ASIL-B compliance or extended diagnostic capability is mandated. |
| MAX35102GTP+ | 2-channel, 16-bit SAR architecture; no global-chop; higher noise floor (12.5 µVRMS), lower crosstalk rejection (–90 dB). | Better suited for non-simultaneous, medium-speed control loops where timing alignment is less critical than cost. | Choose MAX35102GTP+ only for cost-sensitive non-automotive applications where simultaneous sampling and ultra-low drift are not required. |
Compared with ADS130B02QPWRQ1, ADS131B02QPWRQ1 delivers higher resolution and built-in safety features at increased power and cost, while MAX35102GTP+ offers lower system cost but sacrifices simultaneous sampling fidelity, offset stability, and automotive qualification - making ADS130B02QPWRQ1 the optimal balance for production-grade BMS front-ends.
Availability
ADS130B02QPWRQ1 is available at Aetrix Electronics and suitable for automotive battery management systems, EV charging station metering, and energy storage system monitoring requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for ADS130B02QPWRQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with deep expertise in automotive-grade signal chain solutions.
The ADS130B02QPWRQ1 belongs to TI's automotive-qualified precision ADC portfolio, engineered specifically for high-accuracy, low-drift, simultaneous-sampling measurement in battery monitoring and energy metering applications.
FAQ
What is the maximum achievable data rate per channel for ADS130B02QPWRQ1?
The ADS130B02QPWRQ1 supports up to 32 kSPS per channel in high-resolution mode with fCLKIN = 8.192 MHz. This rate is sustained across both channels simultaneously with guaranteed sample alignment, enabling real-time power calculation without interpolation. Lower power modes reduce maximum data rates to 16 kSPS (low-power) and 8 kSPS (very-low-power), preserving simultaneous sampling integrity at reduced noise performance.
Does ADS130B02QPWRQ1 require an external reference voltage?
No, ADS130B02QPWRQ1 integrates a precision 1.2-V low-drift bandgap reference with ≤40 ppm/°C drift over –40°C to +125°C. This eliminates the need for external reference components, reduces PCB area, and improves system-level accuracy by removing reference-related errors such as thermal EMF and layout-induced noise coupling.
How does the global-chop mode affect offset performance in ADS130B02QPWRQ1?
Global-chop mode reduces input-referred offset error from ±200 µV (disabled) to ±0.4 µV (enabled) and suppresses offset drift from 500 nV/°C to ≤30 nV/°C over temperature. It also cuts long-term drift from 0.8 µV to 0.25 µV after 1000 hours at 85°C - directly enabling single-point calibration over the full automotive temperature range.
Can ADS130B02QPWRQ1 measure signals below ground potential?
Yes, ADS130B02QPWRQ1 incorporates an integrated negative charge pump that generates a local negative bias rail, allowing differential input voltages as low as AGND – 0.3 V while operating from a single 3.3-V supply. This enables direct measurement of bidirectional shunt currents crossing zero without external level-shifting circuitry.
What SPI interface protocol does ADS130B02QPWRQ1 use?
ADS130B02QPWRQ1 implements a standard SPI-compatible interface with CPOL = 0 and CPHA = 1 timing. It supports full-duplex communication using SCLK, DIN, DOUT, and CS pins, with DRDY indicating data readiness and SYNC/RESET enabling multi-device synchronization or hardware reset - all compliant with automotive EMC requirements.
ADS130B02QPWRQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 20-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- 32k
- Number of Inputs:
- 2
- Input Type:
- Differential
- Data Interface:
- Serial, SPI
- Configuration:
- ADC
- Ratio - S/H:ADC:
- 0:1
- Number of A/D Converters:
- 2
- Architecture:
- Sigma-Delta
- Reference Type:
- Internal
- Voltage - Supply, Analog:
- 2.7V ~ 3.6V
- Voltage - Supply, Digital:
- 2.7V ~ 3.6V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- -40°C ~ 125°C
- Supplier Device Package:
- 20-TSSOP
- Mounting Type:
- Surface Mount
- Grade:
- Automotive
- Qualification:
- AEC-Q100
ADS130B02QPWRQ1 FAQ
1.How can I place an order for ADS130B02QPWRQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for ADS130B02QPWRQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADS130B02QPWRQ1 reliable?
The price and inventory of ADS130B02QPWRQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADS130B02QPWRQ1 is usually 5 days.
3.What payment methods are accepted for ADS130B02QPWRQ1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADS130B02QPWRQ1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADS130B02QPWRQ1?
ADS130B02QPWRQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADS130B02QPWRQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADS130B02QPWRQ1?
For technical support, including ADS130B02QPWRQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADS130B02QPWRQ1 requirements.
6.How does Aetrix verify that ADS130B02QPWRQ1 is sourced from the original manufacturer or authorized distributors?
All ADS130B02QPWRQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADS130B02QPWRQ1 meets industry standards.
7.What is the process for return or replacement of ADS130B02QPWRQ1?
All ADS130B02QPWRQ1 units undergo pre-shipment inspection (PSI). If there is an issue with ADS130B02QPWRQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADS130B02QPWRQ1 part is unused and in its original packaging.
Return procedure for ADS130B02QPWRQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ADS130B02QPWRQ1 Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
