Texas Instruments ADS1672IPAGRG4

Overview

ADS1672IPAGRG4 from Texas Instruments is a 24-bit, delta-sigma analog-to-digital converter (ADC) with dual-path programmable digital filtering, 107 dB dynamic range at 625 kSPS, ±3 ppm INL, and chopper-stabilized modulator architecture. It operates from +5 V analog and +3 V digital supplies, dissipates 350 mW, and targets high-precision ac/dc measurement in vibration analysis and automated test equipment.

For engineers reviewing the ADS1672IPAGRG4 datasheet, ADS1672IPAGRG4 pinout, ADS1672IPAGRG4 application, or ADS1672IPAGRG4 equivalent, key selection criteria include low-latency vs. wide-bandwidth filter path selection, out-of-range detection capability, CMOS/LVDS serial interface flexibility, and industrial temperature range (–40°C to +85°C) operation.

Technical Context

The ADS1672IPAGRG4 integrates a chopper-stabilized delta-sigma modulator with out-of-range detection and two independent digital filter paths: low-latency (single-cycle settling, up to 180 kSPS) and wide-bandwidth (305 kHz passband, <0.001 dB ripple). Filter path (FPATH), latency mode (LL_CONFIG), and data rate (DRATE[1:0]) are controlled via dedicated I/O pins-no register programming required.

Conversion is initiated by toggling the START pin synchronized to the master clock (CLK); data readiness is signaled by DRDY, and output is serialized via DOUT/DRDY differential pairs supporting either CMOS or LVDS logic levels. Power-down is managed via active-low PDWN, reducing consumption to 5 mW.

Key Specifications

Pinout & Package

TQFP-64 package with exposed thermal pad; 10 mm × 10 mm body, 0.5 mm pitch, lead-free and RoHS compliant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed, high-precision ADC applications.

Compared with ADS1675IPAG and AD7768-1ACPZ, the ADS1672IPAGRG4 uniquely delivers hardware-selectable dual filter paths with zero-software configuration, making it optimal for deterministic real-time systems where START-triggered conversions and out-of-range flagging are critical.

Availability

ADS1672IPAGRG4 is available at Aetrix Electronics and suitable for vibration analysis systems, automated test equipment, sonar receivers, and high-resolution test & measurement instruments requiring stable component supply across long production lifecycles.

Supply support for ADS1672IPAGRG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and high-performance data converters for industrial, automotive, and communications markets.

The ADS1672IPAGRG4 belongs to TI's precision delta-sigma ADC product line, designed specifically for applications demanding both high-speed sampling and metrology-grade dc accuracy in harsh industrial environments.

FAQ

What is the maximum data rate supported by the ADS1672IPAGRG4 in wide-bandwidth filter mode?

The ADS1672IPAGRG4 achieves a maximum data rate of 625 kSPS in wide-bandwidth filter mode, delivering 107 dB dynamic range and 305 kHz passband bandwidth with less than 0.001 dB passband ripple. This rate is confirmed in the Electrical Characteristics table under "Data rate (fDATA)" with FPATH = 0 and DRATE[1:0] = 11. At this speed, the ADS1672IPAGRG4 maintains –113 dB THD and 99 dB SNR for a 10 kHz input at –6 dBFS.

How does the low-latency filter path of the ADS1672IPAGRG4 achieve single-cycle settling?

The low-latency filter path in the ADS1672IPAGRG4 achieves true single-cycle settling by discarding all prior modulator data and outputting only the result of the most recent conversion cycle-enabled when LL_CONFIG = 0 and FPATH = 1. At 180 kSPS (DRATE[1:0] = 11), this yields 5.5 ms complete settling time, verified in Table 5 of the SBAS402D datasheet. The ADS1672IPAGRG4 does not require data discard or post-processing delay, unlike conventional sinc filters.

Can the ADS1672IPAGRG4 operate with an external reference voltage other than 3.0 V?

Yes, the ADS1672IPAGRG4 supports VREF = (VREFP – VREFN) from 2.75 V to 3.25 V, as specified in the Electrical Characteristics table. Operation at 3.0 V is typical, but deviations within this range scale full-scale input linearly: ±VREF defines the differential input range. Using 2.75 V reduces full-scale range to ±2.75 V and increases input-referred noise slightly, while maintaining all dc accuracy specs (INL, offset drift) over temperature.

What is the function of the VCM pin on the ADS1672IPAGRG4, and how must it be used?

The VCM pin on the ADS1672IPAGRG4 outputs AVDD/2 (2.5 V nominal) to establish common-mode bias for external driving amplifiers. It must be bypassed with a 1 µF capacitor placed directly at the pin-even if unused-as stated in the Application Information section. The ADS1672IPAGRG4 specifies 2.5 V common-mode input voltage for optimal CMRR and THD; driving circuits should center their differential output at VCM to meet datasheet AC performance.

Does the ADS1672IPAGRG4 require external configuration registers or firmware initialization?

No, the ADS1672IPAGRG4 requires no external configuration registers or firmware initialization. All operational modes-including filter path (FPATH), latency configuration (LL_CONFIG), data rate (DRATE[1:0]), interface type (LVDS), and SCLK source (SCLK_SEL)-are set via dedicated digital I/O pins. The ADS1672IPAGRG4 begins functioning immediately upon power-up and stable clock application; no SPI/I²C communication or register writes are needed.