Texas Instruments ADS2806Y/250

Overview

ADS2806Y/250 from Texas Instruments is a dual, 12-bit, 32 MSPS pipelined analog-to-digital converter (ADC) with differential track-and-hold, 73 dB SFDR at 10 MHz f_IN, ±0.4 LSB DLE, and flexible 2 V_p-p to 3 V_p-p input range. It operates in communications IF processing and medical imaging systems requiring high dynamic range and low distortion.

For engineers reviewing the ADS2806Y/250 datasheet, ADS2806Y/250 pinout, ADS2806Y/250 application, or ADS2806Y/250 equivalent, key selection considerations include sampling rate (32 MSPS), spurious-free dynamic range (73 dBFS @ 10 MHz), internal/external reference support, TQFP-64 package thermal resistance (21.5 °C/W), and dual-channel over-range flag functionality.

Technical Context

The ADS2806Y/250 employs an 11-stage pipelined architecture with digital error correction logic ensuring no missing codes and ±0.4 LSB differential linearity. Its differential track-and-hold provides excellent common-mode noise immunity and supports both differential and single-ended analog inputs.

It features dual independent 12-bit CMOS output buses with 3-state enable (OEA/OEB), separate logic driver supplies (VDRVA/VDRVB), and dedicated over-range indicators (OVRA/OVRB) per channel. The internal reference can be disabled for external reference use, and full-scale range is selected via the SEL pin (2 V_p-p or 3 V_p-p).

Key Specifications

Pinout & Package

TQFP-64 package with 10 mm × 10 mm body, 0.5 mm pitch, and exposed thermal pad for enhanced heat dissipation. Pin 1 marked by corner cut; pins numbered counterclockwise.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-channel, high-speed ADC applications.

Compared with ADS2806Y/250, ADS2807Y/250 trades resolution and SFDR for speed and power efficiency, while AD9236BCPZ-40 offers higher sample rate in smaller package but lacks dual-channel integration and internal reference-requiring additional components and layout effort.

Availability

ADS2806Y/250 is available at Aetrix Electronics and suitable for communications base stations, medical ultrasound systems, and automated test equipment requiring stable component supply, long-term obsolescence management, and traceable lot-level sourcing.

Supply support for ADS2806Y/250 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with over 90 years of innovation in precision data conversion and signal chain solutions.

The ADS2806Y/250 belongs to TI's high-performance analog-to-digital converter product line, designed specifically for demanding IF sampling, medical imaging, and instrumentation applications where dynamic range, linearity, and dual-channel synchronization are critical.

FAQ

What is the maximum sampling rate supported by the ADS2806Y/250?

The ADS2806Y/250 supports a maximum sampling rate of 32 million samples per second (MSPS). This is specified under standard operating conditions (T_A = –40°C to +85°C, V_S = +5 V, 2–3 V_p-p input range). At this rate, the convert clock period is 31.25 ns, and data latency remains fixed at 6 clock cycles. Exceeding 32 MSPS may degrade SFDR and SNR performance beyond datasheet limits.

Does the ADS2806Y/250 require an external reference, or does it include an internal one?

The ADS2806Y/250 includes an internal reference that can be enabled or disabled via the INT/EXT pin. When INT/EXT is LOW, the internal reference is active, providing REFT ≈ +3.0 V and REFB ≈ +2.0 V for 2 V_p-p full-scale operation. When HIGH, the internal reference is disabled, allowing external precision references to be applied to REFTA/REFBA and REFTB/REFBB pins-critical for multichannel coherent systems.

How does the SEL pin affect the input range of the ADS2806Y/250?

The SEL pin configures the full-scale input range of the ADS2806Y/250: logic LOW selects 2 V_p-p differential input range (using internal REFT = +3.0 V and REFB = +2.0 V), while logic HIGH selects 3 V_p-p (REFT = +3.25 V, REFB = +1.75 V). This setting directly scales the reference voltage difference and must match the driving amplifier's output swing to avoid clipping or underutilization of ADC code space.

What is the purpose of the OVRA and OVRB pins on the ADS2806Y/250?

The OVRA and OVRB pins are open-drain over-range indicators for Channels A and B respectively. They assert LOW when the corresponding analog input exceeds the configured full-scale range (2 V_p-p or 3 V_p-p). These flags enable real-time front-end gain control-e.g., reducing VGA gain within 2 ns of overdrive detection-to prevent data corruption and maintain signal integrity in automatic gain control loops.

Can the ADS2806Y/250 operate with different logic supply voltages on its digital outputs?

Yes, the ADS2806Y/250 supports independent logic driver supplies via VDRVA and VDRVB pins, allowing 3 V or 5 V CMOS-compatible output levels per channel. This enables direct interfacing with mixed-voltage FPGAs or ASICs without external level shifters. Output voltage specifications (e.g., V_OH = +4.8 V at I_OH = 0.5 mA for VDRV = 5 V) are guaranteed across the full temperature range and load conditions.