Texas Instruments ADS5292IPFPT
- Part No.:
- ADS5292IPFPT
- Manufacturer:
- Texas Instruments
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 80-TQFP Exposed Pad
- Datasheet:
-
ADS5292IPFPT.pdf
- Description:
- IC ADC 12BIT PIPELINED 80HTQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ADS5292IPFPT from Texas Instruments is an octal-channel, 12-bit, 80 MSPS analog-to-digital converter with integrated digital processing, LVDS serialization, and programmable decimation filters. It delivers 70-dBFS SNR at 5 MHz/80 MSPS, consumes 66 mW per channel at full rate with 2-wire LVDS output, and targets high-channel-count data acquisition in ultrasound imaging systems.
For engineers reviewing the ADS5292IPFPT datasheet, ADS5292IPFPT pinout, ADS5292IPFPT application, or ADS5292IPFPT equivalent, key selection criteria include its 8-channel simultaneous sampling capability, on-chip FIR/IIR filtering, flexible LVDS mapping (1- or 2-wire per channel), 1.8-V operation, and recovery from 6-dB overload within one clock cycle.
Technical Context
The ADS5292IPFPT implements a pipelined CMOS ADC architecture with differential input pairs for all eight channels, each supporting up to 2 VPP analog input range and 550-MHz small-signal bandwidth. Its digital processing block includes a programmable FIR decimation filter (decimation by 2, 4, or 8), a programmable IIR high-pass filter for DC offset suppression, and 2- or 4-channel averaging modes to improve SNR.
LVDS output interface supports two configurations: 1-wire (12× serialization, frame clock = fCLKIN) and 2-wire (6× serialization, bit clock = 6×fCLKIN, frame clock = fCLKIN). Programmable channel-to-LVDS-pin mapping simplifies PCB routing, and internal 1.8-V reference ensures consistent performance across devices without external trimming.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution & Sample Rate | 12-bit, 80 MSPS maximum - enables high-fidelity digitization of wideband signals in multi-channel medical and test equipment. |
| SNR / SFDR | 70 dBFS SNR and 85 dBc SFDR at 5 MHz/80 MSPS - supports accurate spectral analysis and low-noise signal capture. |
| Power Consumption | 66 mW per channel at 80 MSPS with 2-wire LVDS - reduces thermal load and system-level power supply requirements. |
| Digital Processing | Programmable FIR decimation (×2/×4/×8) and IIR high-pass filter - allows real-time narrowband signal enhancement and DC offset removal without FPGA resources. |
| LVDS Interface | Configurable 1- or 2-wire per channel, with programmable channel-to-pin mapping - minimizes PCB layer count and eases FPGA receiver interface design. |
| Input Interface | Differential analog inputs (IN1P/IN1N through IN8P/IN8N), 1.8-V AVDD/LVDD supplies - simplifies single-rail power architecture and improves noise immunity. |
| Overload Recovery | Recovers to within 1% of full scale in 1 clock cycle after 6-dB overload - maintains data integrity during transient signal excursions common in ultrasound echo reception. |
Pinout & Package
ADS5292IPFPT is housed in an 80-pin TQFP (PFP) package with exposed thermal pad (12 mm × 12 mm), rated for –40°C to +85°C operation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN1P / IN1N – IN8P / IN8N | Differential analog input pairs (8 channels) | Accepts ±1-V differential signals; each pair referenced to AGND; supports AC-coupled or DC-coupled front-end designs. |
| OUT1A_p / OUT1A_n – OUT8B_p / OUT8B_n | Differential LVDS data outputs (2 wires × 8 channels) | Provides serialized 12-bit data; wire A carries MSB-first data, wire B carries LSB-first or complementary stream depending on configuration. |
| ACLK_p / ACLK_n | Differential LVDS frame clock (1× rate) | Synchronizes data frames across all channels; frequency equals ADC sampling clock (fCLKIN). |
| LCLK_p / LCLK_n | Differential LVDS bit clock (6× or 12× rate) | Times individual data bits; 6× for 2-wire mode, 12× for 1-wire mode - determines minimum FPGA sampling rate required. |
| CLKp / CLKn | Differential ADC sampling clock input | Accepts LVDS, LVPECL, or CMOS clocks; 80-MSPS operation requires ≥0.2-VPP differential swing and 35–65% duty cycle. |
| PD / RESET / CSZ / SCLK / SDATA / SDOUT | Serial control interface and power management | Enables register configuration, partial/complete power-down, and readback via 3-wire SPI-compatible bus running from AVDD. |
| VCM / REFT / REFB / AVDD / LVDD / AGND / LGND | Reference, supply, and ground terminals | VCM outputs 0.95 V (or accepts 1.5 V external reference); REFT/REFB support external 1.0-V reference; separate analog/digital supplies reduce coupling noise. |
Key Features
| Feature | Design Value |
|---|---|
| Programmable FIR decimation filter | Reduces output data rate by 2×, 4×, or 8× while improving SNR in narrowband applications - eliminates need for external digital filtering in ultrasound beamforming. |
| 2- or 4-channel averaging mode | Improves effective SNR by up to 3 dB without increasing latency - beneficial for low-SNR echo signals in medical imaging. |
| Flexible LVDS channel-to-pin mapping | Allows reassignment of ADC channel outputs to any LVDS pair - reduces PCB trace length mismatch and layer count in dense layouts. |
| Internal trimmed 1.8-V reference | Ensures <±2% gain error across temperature and unit-to-unit variation - removes need for external reference calibration in production systems. |
| Low-frequency noise suppression | Integrated IIR high-pass filter removes DC offset and 1/f noise - critical for baseline stability in pulsed-echo applications like ultrasound. |
Applications
| Ultrasound Imaging System | Multi-Channel Data Acquisition |
|---|---|
Use Scenario: Digitizing RF echo signals from 64–128 transducer elements in portable or cart-based ultrasound machines. IC Role / Device Role / Timing Role: Simultaneous 8-channel sampling front-end ADC with on-chip decimation and LVDS serialization for FPGA-based beamforming. Use Value: 70-dBFS SNR and 1-cycle overload recovery preserve weak echo fidelity; 2-wire LVDS cuts interconnect count by 50% vs. parallel interfaces. | Use Scenario: High-density sensor monitoring in industrial process control, where 8 analog inputs (e.g., pressure, temperature, strain) require synchronized digitization. IC Role / Device Role / Timing Role: Octal ADC with deterministic latency (15 clock cycles in 2-wire mode) and programmable digital gain (0–12 dB) for dynamic range adaptation. Use Value: Internal reference and 1.8-V supplies simplify power design; channel averaging improves resolution for low-amplitude sensor outputs. |
| Communications Test Equipment | Phased Array Radar Receiver |
Use Scenario: Capturing wideband IF signals (up to 65 MHz) in vector signal analyzers or protocol testers requiring >70 dBc SFDR. IC Role / Device Role / Timing Role: High-linearity ADC with 85 dBc SFDR at 5 MHz and 76 dBc at 65 MHz, supporting multi-tone and modulated signal analysis. Use Value: Low harmonic distortion and 320-fs RMS aperture jitter enable accurate EVM and ACLR measurements in 5G NR and Wi-Fi 6E test setups. | Use Scenario: Digitizing downconverted radar returns across multiple receive channels in AESA radar systems with tight phase coherence requirements. IC Role / Device Role / Timing Role: 8-channel ADC with matched channel timing (±175 ps aperture delay variation) and programmable digital gain for adaptive clutter suppression. Use Value: Channel-to-channel skew <200 ps ensures coherent beam synthesis; LVDS output mapping avoids crosstalk in high-speed routing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar octal-channel, 12-bit ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS5294IPFPT | Pin-to-pin and register compatible; identical architecture but rated for 65 MSPS max sample rate and lower power (54 mW/ch at 65 MSPS). | Better suited for cost-sensitive, lower-bandwidth systems where 80 MSPS is not required. | Select ADS5294IPFPT when system clocking constraints or thermal budget preclude full 80 MSPS operation. |
| AD9222ASTZ | 8-channel, 12-bit, 65 MSPS ADC from Analog Devices; uses CMOS parallel output (not LVDS); no on-chip decimation or averaging. | Requires external FPGA logic for data aggregation and filtering; higher board-level interconnect density. | Choose AD9222ASTZ only if legacy CMOS interface compatibility or vendor consolidation outweighs LVDS serialization benefits. |
Compared with ADS5294IPFPT and AD9222ASTZ, the ADS5292IPFPT uniquely combines 80 MSPS sampling, integrated LVDS serialization with pin-mapping flexibility, and on-chip digital processing - reducing FPGA resource usage and PCB complexity in high-channel-count, space-constrained systems.
Availability
ADS5292IPFPT is available at Aetrix Electronics and suitable for ultrasound imaging systems, multi-channel data acquisition platforms, and communications test equipment requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for ADS5292IPFPT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and high-performance data converters for industrial, medical, and communications markets.
The ADS5292IPFPT belongs to TI's high-channel-count, low-power ADC product line, designed specifically for medical ultrasound, phased-array radar, and automated test equipment where simultaneous sampling, on-chip digital processing, and compact LVDS interfacing are critical.
FAQ
What is the maximum sampling rate supported by the ADS5292IPFPT?
The ADS5292IPFPT supports a maximum sampling rate of 80 MSPS across all eight channels simultaneously. This rate is achievable with 12-bit resolution and specified under recommended operating conditions: AVDD = 1.8 V, LVDD = 1.8 V, differential input amplitude ≤2 VPP, and clock duty cycle between 35% and 65%. At 80 MSPS, the device consumes 66 mW per channel using the 2-wire LVDS output interface.
Does the ADS5292IPFPT include an internal voltage reference?
Yes, the ADS5292IPFPT integrates an internal 1.8-V reference trimmed for accuracy across temperature and unit-to-unit variation. In internal reference mode, it achieves <±2% total gain error and supports optimal SNR performance. The device also accepts external references via REFT (1.45 V) and REFB (0.45 V) pins, and VCM can be configured as a 1.5-V external reference input when needed.
How does the programmable LVDS channel-to-pin mapping benefit PCB layout for the ADS5292IPFPT?
The ADS5292IPFPT's programmable mapping module allows any ADC input channel (e.g., IN3P/IN3N) to be routed to any LVDS output pair (e.g., OUT5A_p/OUT5A_n). This eliminates fixed routing constraints, reduces trace length mismatch between channels, lowers layer count in high-density boards, and avoids costly redesigns when signal integrity issues arise - especially valuable in ultrasound probe interface modules with tight space constraints.
What is the overload recovery time specification for the ADS5292IPFPT?
The ADS5292IPFPT recovers from a 6-dB overload condition to within 1% of full-scale value in exactly one ADC clock cycle. This behavior is guaranteed across the full operating temperature range (–40°C to +85°C) and applies to all eight channels. Fast recovery preserves data validity during transient signal bursts common in ultrasound echo reception and pulsed radar applications.
Can the ADS5292IPFPT perform on-chip digital filtering, and what types are supported?
Yes, the ADS5292IPFPT includes a configurable digital processing block with two primary filters: a programmable FIR decimation filter (with decimation ratios of ×2, ×4, or ×8) and a programmable IIR high-pass filter. The FIR filter improves SNR in narrowband applications and reduces output data rate; the IIR filter suppresses DC offset and low-frequency noise - both configurable via the serial interface without external processing resources.
ADS5292IPFPT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 80-TQFP Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 80M
- Number of Inputs:
- 8
- Input Type:
- Differential
- Data Interface:
- LVDS - Serial
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 8
- Architecture:
- Pipelined
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 1.7V ~ 1.9V
- Voltage - Supply, Digital:
- 1.7V ~ 1.9V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 80-HTQFP (12x12)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
ADS5292IPFPT FAQ
1.How can I place an order for ADS5292IPFPT through Aetrix?
Please submit a Request for Quotation (RFQ) for ADS5292IPFPT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADS5292IPFPT reliable?
The price and inventory of ADS5292IPFPT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADS5292IPFPT is usually 5 days.
3.What payment methods are accepted for ADS5292IPFPT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADS5292IPFPT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADS5292IPFPT?
ADS5292IPFPT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADS5292IPFPT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADS5292IPFPT?
For technical support, including ADS5292IPFPT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADS5292IPFPT requirements.
6.How does Aetrix verify that ADS5292IPFPT is sourced from the original manufacturer or authorized distributors?
All ADS5292IPFPT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADS5292IPFPT meets industry standards.
7.What is the process for return or replacement of ADS5292IPFPT?
All ADS5292IPFPT units undergo pre-shipment inspection (PSI). If there is an issue with ADS5292IPFPT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADS5292IPFPT part is unused and in its original packaging.
Return procedure for ADS5292IPFPT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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