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Texas Instruments ADS52J90ZZE

Part No.:
ADS52J90ZZE
Manufacturer:
Texas Instruments
Category:
Analog to Digital Converters (ADC)
Package:
198-LFBGA
Datasheet:
AetrixADS52J90ZZE.pdf
Description:
IC ADC 14BIT PIPELINED 198NFBGA
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:180

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Product details

Overview

ADS52J90ZZE from Texas Instruments is a 16-channel, multibit analog-to-digital converter (ADC) supporting configurable 8/16/32-input modes with resolution options of 10-, 12-, or 14-bit. It achieves up to 100 MSPS in 10-bit mode, delivers 61–73.5 dBFS SNR across resolutions, and uses LVDS serialization for high-speed data output. It targets ultrasound imaging front-ends requiring low-power, high-channel-count digitization.

For engineers reviewing the ADS52J90ZZE datasheet, ADS52J90ZZE pinout, ADS52J90ZZE application, or ADS52J90ZZE equivalent, key selection considerations include input configuration flexibility (8/16/32 inputs), resolution–speed trade-offs (100/80/65 MSPS), LVDS serialization ratio (10X–16X), power scaling per channel (41 mW at 100 MSPS), and NFBGA-198 thermal/mechanical compatibility.

Technical Context

The ADS52J90ZZE implements 16 independent ADC cores with programmable interleaving logic: in 32-input mode, each core alternately samples two inputs at half the conversion rate; in 8-input mode, two cores interleave on one input to double effective sampling rate. Clocking supports differential or single-ended inputs with dedicated FCLKP/FCLKM and DCLKP/DCLKM pairs.

Digital processing includes on-chip LVDS serializer with selectable 10X/12X/14X/16X serialization ratios, frame clock (FCLK) and bit clock (DCLK) outputs, and serial interface (SEN/SCLK/SDIN/SDOUT) for configuration. Power domains are segregated: AVDD_1P8 and AVSS for analog, DVDD_1P2/DVDD_1P8 and DVSS for digital/LVDS, enabling independent supply optimization.

Key Specifications

ParameterValue and Actual Design Meaning
Resolution Modes10-bit (100 MSPS), 12-bit (80 MSPS), 14-bit (65 MSPS) - defines SNR, dynamic range, and maximum throughput per channel
Effective Sampling RateConfigurable: 2× ADC rate (8-input), 1× (16-input), or 0.5× (32-input) - determines system-level channel density vs. bandwidth trade-off
Signal-to-Noise Ratio61 dBFS (10-bit), 70 dBFS (12-bit), 73.5 dBFS (14-bit) - sets usable dynamic range for medical/sonar signal fidelity
LVDS Serialization10X, 12X, 14X, or 16X - selects output lane count and timing margin for FPGA/CPLD interface design
Supply VoltagesAVDD_1P8 = 1.8 V (analog), DVDD_1P2 = 1.2 V & DVDD_1P8 = 1.8 V (digital/LVDS) - requires three independent low-noise LDOs
Input Interface2-VPP differential, 0.8-V common-mode - mandates matching AC-coupled or transformer-coupled front-end driver stages
Operating Temperature–40°C to +85°C - validated for industrial and portable medical equipment environments

Pinout & Package

The ADS52J90ZZE is housed in a 9.0 mm × 15.0 mm, 0.8-mm pitch NFBGA-198 package with exposed thermal pad. Pin functions are defined per TI SBAS690A Rev A (June 2015), including dual clock inputs (CLKP/CLKM, FCLKP/FCLKM), 32 analog inputs (INP1–INP32, INM1–INM32), 32 LVDS output pairs (DOUTP1/DOUTM1 through DOUTP16/DOUTM16), and dedicated serial control (SEN, SCLK, SDIN, SDOUT).

Pin/TerminalCircuit RoleDesign Meaning
CLKP / CLKMDifferential sampling clock inputAccepts 2-VPP diff clock; determines ADC core conversion timing; referenced to AVSS
FCLKP / FCLKMDifferential frame clock outputLVDS frame sync signal for multi-device alignment; sourced from internal clock generator
DCLKP / DCLKMDifferential bit clock outputHigh-speed LVDS bit clock synchronized to serialized data; used by FPGA deserializer
DOUTP1–DOUTP16 / DOUTM1–DOUTM16LVD data outputs16 differential pairs carrying time-multiplexed ADC channel data; 10X–16X serialized
SEN / SCLK / SDIN / SDOUTSerial configuration interface4-wire SPI-compatible bus for register programming; operates at ≤10 MHz; isolated from high-speed data paths
RESET / PDN_GBL / PDN_FAST / SYNCControl and synchronizationAsynchronous reset, global power-down, fast power-down, and multi-device sync trigger - enables coordinated power and timing management

Key Features

FeatureDesign Value
Configurable input count (8/16/32)Enables single-device adaptation across probe densities in ultrasound systems without PCB redesign
Resolution–speed scalingAllows runtime trade-off between image depth (14-bit/65 MSPS) and frame rate (10-bit/100 MSPS) in portable scanners
Per-channel power scalingReduces total power from 656 mW (16 ch @ 100 MSPS) to ~328 mW (16 ch @ 50 MSPS), critical for battery operation
LVDS output with selectable serializationSupports 10X (fewer lanes, higher timing margin) or 16X (lower pin count, tighter skew control) for FPGA I/O planning
Dual clock domain supportSeparates sampling clock (CLKP/M) from serializer clock (FCLKP/M, DCLKP/M), easing clock tree isolation and jitter management

Applications

Ultrasound Imaging Front-EndPortable SONAR Data Acquisition

Use Scenario: Real-time beamforming in handheld ultrasound probes with 64–128 transducer elements.

IC Role / Device Role / Timing Role: 16-channel simultaneous digitization of echo return signals; provides time-aligned sample streams via FCLK/DCLK synchronization.

Use Value: Enables 10-bit mode at 100 MSPS for high-frame-rate B-mode imaging while maintaining 61 dBFS SNR for tissue contrast resolution.

Use Scenario: Multi-beam underwater target detection using compact towed array with limited power budget.

IC Role / Device Role / Timing Role: Digitizes 32 hydrophone channels in time-interleaved 32-input mode at 0.5× ADC rate (32.5 MSPS in 14-bit mode).

Use Value: Delivers 73.5 dBFS SNR at 65 MSPS base rate, preserving weak echo fidelity over long propagation distances.

High-Speed Industrial DAQRADAR Receiver Channel Digitization

Use Scenario: 16-sensor vibration monitoring in predictive maintenance systems with FPGA-based FFT processing.

IC Role / Device Role / Timing Role: Simultaneous sampling of 16 analog sensor outputs; LVDS outputs routed directly to Xilinx Artix-7 bank with 16X serialization.

Use Value: 41 mW/channel power at 100 MSPS allows full 16-channel operation within 1 W thermal envelope on dense PCBs.

Use Scenario: Digital beamforming in compact automotive RADAR ECU with space-constrained layout.

IC Role / Device Role / Timing Role: Digitizes 8 RF downconverted channels in 8-input mode with 2× interleaving for 200 MSPS effective rate (10-bit).

Use Value: Doubled effective sampling supports fine-range resolution (≤1 cm) without external ADC parallelization or complex PCB routing.

Equivalent & Alternatives

The following parts are listed as comparable options for similar multichannel, high-speed ADC applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
ADS52J65IRGCT16-channel, 12-bit only, 80 MSPS max, NFBGA-161 package (8 mm × 8 mm)Lacks 10-/14-bit modes and 32-input configuration; lower pin count reduces board area but limits scalabilityChoose when fixed 12-bit resolution and smaller footprint outweigh flexibility needs
AD9671KCPZAnalog Devices 8-channel, 14-bit, 125 MSPS, integrated LNA/VGA/AAF; CSP-BGA-144Includes analog front-end; not pin-compatible; higher per-channel power (155 mW)Prefer when analog signal conditioning is required on-die and channel count is ≤8

Compared with ADS52J65IRGCT and AD9671KCPZ, the ADS52J90ZZE uniquely supports three resolution modes and scalable input counts (8/16/32) in a single NFBGA-198 package, making it optimal for ultrasound platforms needing both high frame rate and deep penetration modes without hardware variants.

Availability

ADS52J90ZZE is available at Aetrix Electronics and suitable for ultrasound imaging systems, portable SONAR receivers, high-speed industrial data acquisition, and compact RADAR receiver modules requiring stable component supply across extended production lifecycles.

Supply support for ADS52J90ZZE includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a U.S.-based semiconductor company specializing in analog, embedded processing, and high-performance data converters for industrial, medical, and communications markets.

The ADS52J90ZZE belongs to TI's high-channel-count, low-power ADC product line designed specifically for portable and real-time multichannel signal acquisition where power efficiency, configurability, and LVDS interface integrity are critical.

FAQ

What resolution and sampling rate combinations does the ADS52J90ZZE support?

The ADS52J90ZZE supports three discrete resolution–rate pairings: 10-bit at up to 100 MSPS, 12-bit at up to 80 MSPS, and 14-bit at up to 65 MSPS. These are hard-coded operating modes - no interpolation or oversampling is performed. Each mode delivers corresponding SNR values of 61 dBFS, 70 dBFS, and 73.5 dBFS respectively, as measured under standard test conditions per SBAS690A.

How does the ADS52J90ZZE handle 32-input configuration with only 16 ADC cores?

The ADS52J90ZZE achieves 32-input operation by time-interleaving its 16 ADC cores: each core alternately samples two distinct analog inputs, resulting in an effective sampling rate that is half the ADC conversion rate. This architecture maintains full 16-channel parallel output timing while doubling input channel count without increasing core count or power proportionally.

What are the voltage and sequencing requirements for ADS52J90ZZE supplies?

The ADS52J90ZZE requires three independent supplies: AVDD_1P8 (1.8 V, analog), DVDD_1P2 (1.2 V, digital logic), and DVDD_1P8 (1.8 V, LVDS drivers). Per SBAS690A, AVDD_1P8 must be powered first and ramped monotonically; DVDD_1P2 and DVDD_1P8 may be powered simultaneously but must stabilize before RESET release. Undervoltage lockout is not integrated - external supervisors are recommended.

Can the ADS52J90ZZE LVDS outputs interface directly with Xilinx Artix-7 FPGA banks?

Yes, the ADS52J90ZZE LVDS outputs comply with ANSI TIA/EIA-644-A and are compatible with Xilinx Artix-7 HP bank LVDS_25 I/O standards. The device supports 10X–16X serialization, allowing mapping to 10–16 differential pairs. FCLK and DCLK outputs provide deterministic phase alignment for IDELAYE2 calibration, and setup/hold margins exceed 150 ps at 100 MSPS base rate.

Is the ADS52J90ZZE RoHS compliant and what is its moisture sensitivity level?

Yes, the ADS52J90ZZE is RoHS compliant (Pb-free, green) and carries an MSL Level-3 rating per JEDEC J-STD-020, with peak reflow temperature of 260°C and floor life of 168 hours at ≤30°C/60% RH. The device marking "ADS52J90" appears on the top surface, and packaging is JEDEC-standard tray (160 units per tray).

ADS52J90ZZE Specifications

Product attributes
Attribute value
Manufacturer:
Texas Instruments
Series:
-
Package/Case:
198-LFBGA
Packaging:
Tray
Product Status:
Active
Number of Bits:
14
Sampling Rate (Per Second):
100M
Number of Inputs:
8, 16, 32
Input Type:
Differential
Data Interface:
LVDS - Serial
Configuration:
MUX-ADC
Ratio - S/H:ADC:
-
Number of A/D Converters:
16
Architecture:
Pipelined
Reference Type:
External, Internal
Voltage - Supply, Analog:
1.7V ~ 1.9V
Voltage - Supply, Digital:
1.15V ~ 1.25V, 1.7V ~ 1.9V
Features:
Simultaneous Sampling
Operating Temperature:
-40°C ~ 85°C
Supplier Device Package:
198-NFBGA (9x15)
Mounting Type:
Surface Mount
Grade:
-
Qualification:
-

ADS52J90ZZE FAQ

1.How can I place an order for ADS52J90ZZE through Aetrix?

Please submit a Request for Quotation (RFQ) for ADS52J90ZZE on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ADS52J90ZZE reliable?

The price and inventory of ADS52J90ZZE are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADS52J90ZZE is usually 5 days.

3.What payment methods are accepted for ADS52J90ZZE?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADS52J90ZZE transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ADS52J90ZZE?

ADS52J90ZZE orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ADS52J90ZZE order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ADS52J90ZZE?

For technical support, including ADS52J90ZZE datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADS52J90ZZE requirements.

6.How does Aetrix verify that ADS52J90ZZE is sourced from the original manufacturer or authorized distributors?

All ADS52J90ZZE products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADS52J90ZZE meets industry standards.

7.What is the process for return or replacement of ADS52J90ZZE?

All ADS52J90ZZE units undergo pre-shipment inspection (PSI). If there is an issue with ADS52J90ZZE, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ADS52J90ZZE part is unused and in its original packaging.

Return procedure for ADS52J90ZZE:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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