Texas Instruments ADS5485EVM

Overview

ADS5485EVM from Texas Instruments is an evaluation module designed to characterize the ADS5485 16-bit, 135-MSPS analog-to-digital converter (ADC) under controlled analog input, clock, and power supply conditions. It supports transformer-coupled or THS4509-amplified single-ended inputs, onboard VCXO + CDCE72010 clock synthesis (with crystal-filtered or differential LVPECL outputs), and dual power supply options (6–36 V cascaded switching/LDO or 5.1–5.5 V LDO-only).

For engineers reviewing the ADS5485EVM datasheet, ADS5485EVM pinout, ADS5485EVM application, or ADS5485EVM equivalent, this page details its configurable analog input paths, clock routing options (J12 direct, Y0 crystal-filtered, or Y1P/Y1N LVPECL), power jumper settings (JP12–JP17), LVDS digital output interface at J4, and integration with TSW1200 capture hardware for FFT-based performance validation.

Technical Context

The ADS5485EVM implements a modular signal chain: analog input is routed either directly via transformer coupling (J1 → AIN+/-) or through the THS4509 differential amplifier (SJP1/SJP2 configured for amp-out path), with optional bandpass filtering. Clocking supports three distinct modes - external single-ended clock at J12 (converted to differential by ADT4-1WT), crystal-filtered 122.88 MHz LVCMOS from CDCE72010 Y0 output, or differential LVPECL from Y1P/Y1N - each selected via SJP6/SJP7/SJP8 jumpers.

Power delivery is configurable via six jumpers (JP12–JP17): Option 1 uses TPS5420D (6–36 V input) cascaded with TPS79501DCQ and TPS79633 for low-noise 5 V AVDD and 3.3 V DVDD; Option 2 bypasses the switcher for direct 5.1–5.5 V LDO-fed rails; Option 3 isolates AVDD/DVDD for current consumption measurement. Digital outputs are LVDS-compliant and accessed via 20-pin header J4 with mandatory 100 Ω termination.

Key Specifications

Availability

ADS5485EVM is available at Aetrix Electronics and suitable for high-speed data acquisition systems, radar front-end prototyping, communications test equipment, and wideband instrumentation requiring stable component supply and validated ADC evaluation infrastructure.

Supply support for ADS5485EVM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments (TI) is a global semiconductor company headquartered in Dallas, Texas, specializing in analog, embedded processing, and high-performance data converter technologies.

The ADS5485EVM belongs to TI's precision high-speed ADC evaluation platform family, engineered to accelerate time-to-test for RF-sampling and wideband digitization applications in defense, test & measurement, and communications infrastructure.

FAQ

What is the primary function of the ADS5485EVM?

The ADS5485EVM is a dedicated evaluation module for the ADS5485 16-bit, 135-MSPS analog-to-digital converter. It provides configurable analog input (transformer-coupled or THS4509-amplified), multiple clocking paths (external, crystal-filtered, or LVPECL), flexible power delivery (6–36 V or 5.1–5.5 V), and LVDS digital output access via J4. Its purpose is to enable accurate performance characterization - including SNR, SINAD, and SFDR - under real-world signal, timing, and supply conditions. The ADS5485EVM is not a production component but a lab-grade validation tool.

Which clock sources does the ADS5485EVM support for the ADS5485 ADC?

The ADS5485EVM supports three clock configurations for the ADS5485: (1) external single-ended clock applied to SMA connector J12 (converted to differential by ADT4-1WT transformer), (2) onboard 122.88 MHz LVCMOS clock from CDCE72010 Y0 output, filtered through a user-populated 122.88 MHz crystal filter, and (3) differential LVPECL clock from CDCE72010 Y1P/Y1N outputs. Jumpers SJP6, SJP7, and SJP8 select the active path. Option 2 (crystal-filtered) delivers best SNR (77.94 dBFS), while Option 3 (LVPECL) yields lower performance (72.94 dBFS) and is not recommended for SNR-critical use.

How is analog input configured on the ADS5485EVM?

Analog input on the ADS5485EVM is configured via jumpers SJP1, SJP2, SJP3, and SJP4. Default Analog Input Option 1 uses SMA connector J1 directly into the ADC's AIN+/- pins via transformer coupling (SJP1/SJP2 = 2-3). Analog Input Option 2 routes J1 through the THS4509 differential amplifier (SJP1/SJP2 = 1-2), with optional bandpass filtering (components unpopulated by default). J2 is a non-populated SMA for differential input testing. Power to the THS4509 is supplied via banana jacks J7 (+5 V) and J9 (GND), controlled by JP3 (amplifier power-down).

What power supply options does the ADS5485EVM offer?

The ADS5485EVM offers three jumper-configurable power options: Option 1 uses TPS5420D (6–36 V input) cascaded with TPS79501DCQ and TPS79633 to generate clean 5 V AVDD and 3.3 V DVDD; Option 2 bypasses the switcher for direct 5.1–5.5 V LDO-fed rails (JP15 = 1-2, JP16 = 2-3); Option 3 isolates AVDD and DVDD using external supplies for precise current consumption measurement (JP12/JP13/JP14 wired to external 3.3 V/5.5 V sources, J5 left unpowered). Each option requires specific jumper settings (JP12–JP17) documented in Table 3 of SLAU207.

Can the ADS5485EVM be used with the TSW1200 capture board?

Yes, the ADS5485EVM is fully compatible with the TSW1200 capture board. J4 on the ADS5485EVM provides LVDS digital outputs that connect directly to the TSW1200's LVDS input interface, which includes built-in 100 Ω termination. The TSW1200 software supports ADS5485 selection, allows configuration of sample rate (e.g., 122.88 MSPS) and input frequency, and enables Single Tone FFT analysis. Test results in SLAU207 (Figures 3–8) were captured using this combination, validating SNR up to 77.94 dBFS and SFDR up to 89.95 dBc depending on clock and analog input configuration. The ADS5485EVM's jumper defaults align with TSW1200-ready operation.