Texas Instruments ADS5517EVM

Overview

ADS5517EVM from Texas Instruments is an evaluation module designed to characterize the ADS5517 16-bit, 40-MSPS analog-to-digital converter under controlled signal, clock, reference, and power conditions. It supports transformer-coupled single-ended analog input (J6), onboard VCXO + CDCE72010 clock synthesis (245.76 MHz LVCMOS output via crystal filter), and dual-regulator power delivery (3.3 V AVDD / 1.8 V DVDD or 3.3 V DVDD).

For engineers reviewing the ADS5517EVM datasheet, ADS5517EVM pinout, ADS5517EVM application, or ADS5517EVM equivalent, this module enables rapid validation of high-speed ADC performance metrics-including SNR, SFDR, and ENOB-across multiple clocking topologies (direct SMA, filtered LVCMOS, differential LVPECL), power supply configurations (LDO-only, cascaded switching+LDO), and analog input paths (direct transformer, THS4509-amplified).

Technical Context

The ADS5517EVM implements a flexible, jumper-configurable architecture for evaluating TI's high-performance ADCs. Its core subsystems include a Mini-Circuits ADT4-1WT transformer-based differential input stage, a factory-programmed CDCE72010 clock buffer configured for ×4 VCXO division (983.04 MHz → 245.76 MHz), and dual LDO power regulation (TPS79633 for 3.3 V, TPS79601 for 1.8 V) with optional TPS5420D switching pre-regulation.

Control is implemented via physical jumpers-not firmware-enabling deterministic configuration of analog input routing (J6 direct vs. THS4509 amplified), clock source selection (SMA J19 direct vs. CDCE72010 Y0/Y1P outputs), and power topology (Option 1: 6–36 V cascaded, Option 2: 5.1–5.5 V LDO-only, Option 3: isolated AVDD/DVDD for current measurement). All configurations are validated per SLWU061A user guide.

Key Specifications

Availability

ADS5517EVM is available at Aetrix Electronics and suitable for high-speed data acquisition systems, communications test equipment, and radar receiver prototyping requiring stable component supply, full documentation traceability, and long-term evaluation platform continuity.

Supply support for ADS5517EVM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, delivering analog and embedded processing solutions across industrial, automotive, and communications markets.

The ADS5517EVM belongs to TI's precision high-speed ADC evaluation platform family, engineered specifically to accelerate characterization and system integration of 14–16-bit, 40–125 MSPS pipeline converters in RF sampling and instrumentation applications.

FAQ

What is the primary function of the ADS5517EVM?

The ADS5517EVM is a hardware evaluation platform for the ADS5517 16-bit, 40-MSPS analog-to-digital converter. It provides configurable analog input paths, multiple clocking options (including onboard VCXO + CDCE72010 synthesis), regulated power delivery, and LVDS digital output interfacing-enabling engineers to measure key performance parameters such as SNR, SFDR, and spurious-free dynamic range under real-world signal chain conditions. The ADS5517EVM itself contains no active conversion circuitry; it hosts and exercises the ADS5517 IC.

Does the ADS5517EVM include the ADS5517 IC pre-installed?

Yes, the ADS5517EVM ships with the ADS5517IC mounted and soldered on the PCB. The module is designed for immediate use with default jumper settings (e.g., JP12 = 1-2 for parallel control, SJP4 = 1-2 for direct clock input, JP13/JP14 = 1-2 for 3.3 V supplies). No additional ADC component purchase is required to begin evaluation-the ADS5517EVM is a complete, ready-to-power evaluation system centered around the ADS5517 device.

Can the ADS5517EVM support differential analog input signals?

The ADS5517EVM supports differential analog input indirectly via the THS4509 operational amplifier. When configured with SJP1 = 2-3, SJP2 = 2-3, and SJP5 = 2-3 (per Table 7), the EVM routes signal from SMA connector J8 through the THS4509 to generate a differential output that drives the ADS5517's analog inputs. This requires external 5 V power applied to J9 and ground to J11. Direct differential input without amplification is not supported-the default transformer path (J6) is single-ended only.

What clock sources are supported by the ADS5517EVM?

The ADS5517EVM supports three clock architectures: (1) External single-ended clock via SMA J19 (1.5-Vpp, AC-coupled, transformer-fed to ADS5517); (2) Onboard 983.04 MHz VCXO + CDCE72010 generating 245.76 MHz LVCMOS clock (Y0 output, filtered through optional 245.76 MHz crystal); and (3) Same CDCE72010 generating differential LVPECL clock (Y1P/Y1N outputs). All modes are jumper-selectable per Tables 4 and 5 in SLWU061A, and the CDCE72010 EEPROM is factory-programmed for ×4 division.

Is the ADS5517EVM compatible with the TSW1200 data capture board?

Yes, the ADS5517EVM is fully compatible with the TSW1200 capture board. The LVDS digital output bus is routed to header J10, which matches the TSW1200's input connector pinout and voltage levels. Section 4.1 of SLWU061A explicitly describes TSW1200 integration, including jumper settings (JP8 = 1-2, J22 = 1-2) and software configuration steps in the TSW1200 GUI to select ADS5517, set sample rate, and run FFT analysis. Power can also be shared: the TSW1200 may supply 5 V to the ADS5517EVM via J7.