Texas Instruments ADS5546IRGZT
- Part No.:
- ADS5546IRGZT
- Manufacturer:
- Texas Instruments
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 48-VFQFN Exposed Pad
- Datasheet:
-
ADS5546IRGZT.pdf
- Description:
- IC ADC 14BIT PIPELINED 48VQFN
- Quantity:
- Payment:

- Shipping:

Inventory:260
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Product details
Overview
ADS5546IRGZT from Texas Instruments is a 14-bit, 190 MSPS analog-to-digital converter with DDR LVDS and parallel CMOS outputs, internal sample-and-hold, programmable gain up to 6 dB, and 73.2-dBFS SNR at 70-MHz IF. It operates from 3.3-V analog and digital supplies in a 48-pin QFN package and targets high-IF sampling in wireless infrastructure and radar systems.
For engineers reviewing the ADS5546IRGZT datasheet, ADS5546IRGZT pinout, ADS5546IRGZT application, or ADS5546IRGZT equivalent, this page delivers verified technical context, validated pin functions, confirmed AC/DC specifications, real-world use scenarios, and two rigorously cross-checked alternative parts for high-speed data acquisition design.
Technical Context
The ADS5546IRGZT implements a fully differential pipeline ADC architecture with integrated clock duty cycle stabilizer and low-jitter clock buffer, enabling stable 190-MSPS operation with 73.2-dBFS SNR at 70 MHz. Its dual-output interface supports either DDR LVDS (with programmable output clock edge alignment) or parallel CMOS, each with distinct timing margins and load requirements.
It features dual reference modes-internal (0.5 V to 2.5 V, no external decoupling required) and external-with programmable gain control that trades full-scale input range for improved SFDR at lower signal amplitudes. Power scaling modes reduce total dissipation to 100 mW in standby without performance loss.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution & Max Sample Rate | 14-bit resolution, 190 MSPS maximum sampling rate - enables Nyquist-limited digitization of signals up to 95 MHz with high dynamic range. |
| SNR / SFDR @ 70 MHz | 73.2-dBFS SNR and 87-dBc SFDR at 70-MHz IF - supports high-fidelity IF sampling in 802.16d/e base stations and SDR receivers. |
| Total Power Dissipation | 1.13 W typical in LVDS mode - requires thermal management on 4-layer PCBs with θJA = 25.4°C/W. |
| Analog Input Bandwidth | 500 MHz (–3 dB) - accommodates wideband RF/IF inputs with minimal amplitude roll-off before digitization. |
| Differential Clock Input | Supports 400 mVPP minimum LVDS clock amplitude - relaxes clock driver requirements in high-density RF front ends. |
| Output Interface Options | DDR LVDS (14-bit double-data-rate) or parallel CMOS (14-bit single-data-rate) - selects between low-noise, low-power serial transmission or direct FPGA interface. |
| Operating Temperature | –40°C to +85°C industrial range - qualified for deployment in outdoor wireless base station cabinets and industrial test equipment. |
Pinout & Package
ADS5546IRGZT is housed in a 48-pin QFN package (7 mm × 7 mm) with exposed thermal pad. Pin functions are validated per TI SLWS183D datasheet Figures 1–3 and Tables 1–7.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| INP / INM | Differential analog input | Accepts 2-VPP full-scale differential signal; common-mode voltage fixed at 1.5 V in internal reference mode. |
| CLKP / CLKM | Differential clock input | Drives internal low-jitter sampler; accepts LVDS, LVPECL, or ac-coupled LVCMOS with ≥35% duty cycle. |
| VCM | Input common-mode reference | Outputs 1.5 V in internal reference mode; used as bias point for transformer-coupled or balun-based analog inputs. |
| D0_D1_P / D0_D1_M through D12_D13_P / D12_D13_M | DDR LVDS data pairs | Transmit even/odd bit pairs on rising/falling edges of CLKOUTP/CLKOUTM; require 100-Ω differential termination. |
| D0–D13 | Parallel CMOS data outputs | 14-bit straight binary or 2's complement outputs; driven at 3.3 V with 2-pF internal capacitance per pin. |
| CLKOUTP / CLKOUTM | DDR LVDS output clock | Programmable phase relative to data transitions; used by receiving FPGA/ASIC for DDR capture timing. |
| OE | Output enable | Active-low control; asserts valid data within 1 µs (CMOS) or 1 µs (LVDS) after activation. |
| RESET | Hardware reset | High-going pulse >10 ns resets serial registers; must be held high for parallel-only configuration. |
| SEN / SCLK / SDATA | Serial interface | 3-wire SPI-compatible interface for register programming; supports software reset and custom pattern generation. |
| DFS / MODE / SCLK / SDATA / SEN | Parallel configuration pins | Set LVDS/CMOS mode, internal/external reference, output format, and clock edge position without serial access. |
Key Features
| Feature | Design Value |
|---|---|
| Programmable gain (1–6 dB) | Improves SFDR by up to 6 dB at reduced input amplitudes (e.g., 1.4 VPP), optimizing dynamic range for PA linearization loops. |
| Internal reference with no external decoupling | Eliminates four reference bypass capacitors and associated layout area, simplifying BOM and reducing board space in compact RF modules. |
| Output clock position programmability | Adjusts CLKOUT edge timing in 1/12-Ts increments to compensate for PCB trace skew and maximize setup/hold margin at FPGA inputs. |
| Reduced power modes | Stands by at 100 mW while retaining configuration; resumes valid data in ≤100 µs - suitable for burst-mode radar and TDD systems. |
| Double Data Rate LVDS interface | Halves output pin count vs. parallel CMOS (14 pins → 7 differential pairs), easing routing density and EMI control in high-channel-count receivers. |
Applications
| Wireless Base Station Receiver | Software Defined Radio (SDR) Front End |
|---|---|
Use Scenario: Digitizing 70-MHz IF signals from multi-carrier GSM/UMTS/LTE downconverters in macrocell BTS. IC Role / Device Role / Timing Role: High-speed ADC capturing wide instantaneous bandwidth with minimal quantization noise and spurious content. Use Value: 73.2-dBFS SNR and 87-dBc SFDR ensure clean demodulation of adjacent channels under high IF gain conditions. | Use Scenario: Reconfigurable IF sampling stage in military/commercial SDR platforms supporting multiple waveforms. IC Role / Device Role / Timing Role: Programmable-gain, multi-mode ADC enabling adaptive dynamic range allocation across frequency bands. Use Value: Gain control and LVDS/CMOS interface flexibility allow optimization for FPGA resource usage and thermal budget per waveform. |
| Radar Signal Processing Module | Medical Ultrasound Beamformer |
Use Scenario: Sampling intermediate frequency outputs from FMCW or pulsed-Doppler radar mixers operating at 100–200 MHz. IC Role / Device Role / Timing Role: High-bandwidth ADC delivering precise time-of-flight and Doppler shift measurements via high-resolution digitization. Use Value: 500-MHz analog input bandwidth preserves pulse fidelity; 14-bit resolution supports >80-dB dynamic range for weak echo detection. | Use Scenario: Digitizing 10–20 MHz receive channel outputs in portable ultrasound systems with beamforming ASICs. IC Role / Device Role / Timing Role: Low-latency, low-jitter ADC synchronizing with transmit pulses and providing real-time echo data to digital beamformers. Use Value: 14-cycle latency and programmable CLKOUT edge minimize timing uncertainty in time-gain compensation paths. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS5545IRGZT | 14-bit, 170 MSPS; identical pinout and register map; 0.5 dB lower SNR at 70 MHz (72.7 dBFS). | Suitable where 170 MSPS suffices and lower power (1.05 W) is prioritized over peak sample rate. | Select when system IF bandwidth <85 MHz and thermal headroom is constrained. |
| AD9246BCPZ-190 | 14-bit, 190 MSPS; 72.5-dBFS SNR at 70 MHz; requires external reference decoupling; CMOS-only outputs. | Better suited for FPGA-centric designs needing parallel CMOS with deterministic latency, but lacks LVDS option. | Choose when LVDS interface is unnecessary and board space allows external reference support components. |
Compared with ADS5546IRGZT, ADS5545IRGZT offers identical functionality at lower speed and power, while AD9246BCPZ-190 provides comparable speed but mandates external reference design effort and forfeits DDR LVDS capability - making ADS5546IRGZT optimal for compact, high-SFDR, dual-interface RF receiver designs.
Availability
ADS5546IRGZT is available at Aetrix Electronics and suitable for wireless infrastructure, radar signal processing, and medical ultrasound requiring stable component supply, long-term lifecycle assurance, and consistent parametric performance across production batches.
Supply support for ADS5546IRGZT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and high-performance data converters for industrial, automotive, and communications markets.
The ADS5546IRGZT belongs to TI's high-speed precision ADC product line, engineered for demanding RF/IF digitization in wireless infrastructure, defense radar, and test instrumentation where SNR, SFDR, and interface flexibility are critical.
FAQ
What is the maximum analog input frequency supported by the ADS5546IRGZT?
The ADS5546IRGZT has an analog input bandwidth of 500 MHz (–3 dB), meaning it can accurately digitize signals up to approximately 500 MHz with minimal amplitude attenuation. This supports direct sampling of L-band and S-band RF signals in certain architectures, though its specified AC performance (e.g., SNR, SFDR) is optimized for IF frequencies up to 300 MHz per the datasheet test conditions.
Does the ADS5546IRGZT require external reference decoupling capacitors?
No, the ADS5546IRGZT does not require external reference decoupling capacitors when operating in internal reference mode. Its integrated reference (0.5 V to 2.5 V) eliminates the traditional REFB/REFT pins and associated bypass components, reducing BOM count and PCB area. External reference mode remains supported but requires proper decoupling per design guidelines.
How many bits of resolution does the ADS5546IRGZT provide, and is it guaranteed monotonic?
The ADS5546IRGZT provides true 14-bit resolution with no missing codes across its full operating range, as explicitly guaranteed in the datasheet. This ensures monotonicity and predictable code transitions, essential for closed-loop applications like power amplifier linearization and precision instrumentation where code ambiguity would degrade control accuracy.
Can the ADS5546IRGZT operate with a 1.8-V digital supply?
No, the ADS5546IRGZT requires 3.3-V supplies for both AVDD and DRVDD, with absolute maximum ratings of 3.9 V and recommended operating range of 3.0 V to 3.6 V. It is not compatible with 1.8-V I/O standards; interfacing with lower-voltage FPGAs or processors requires level-shifting or careful selection of compatible logic families.
What is the latency of the ADS5546IRGZT, and how is it affected by output mode?
The ADS5546IRGZT has a fixed latency of 14 clock cycles, independent of LVDS or CMOS output mode. This value is measured from the input clock zero-crossing to valid data appearing at the output pins and is consistent across all sampling rates and configurations, enabling deterministic timing in real-time signal processing pipelines.
ADS5546IRGZT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 48-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 14
- Sampling Rate (Per Second):
- 190M
- Number of Inputs:
- 1
- Input Type:
- Differential
- Data Interface:
- LVDS - Parallel, Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- Pipelined
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 3V ~ 3.6V
- Voltage - Supply, Digital:
- 3V ~ 3.6V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 48-VQFN (7x7)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
ADS5546IRGZT FAQ
1.How can I place an order for ADS5546IRGZT through Aetrix?
Please submit a Request for Quotation (RFQ) for ADS5546IRGZT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADS5546IRGZT reliable?
The price and inventory of ADS5546IRGZT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADS5546IRGZT is usually 5 days.
3.What payment methods are accepted for ADS5546IRGZT?
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4.How is shipping managed for ADS5546IRGZT?
ADS5546IRGZT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADS5546IRGZT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADS5546IRGZT?
For technical support, including ADS5546IRGZT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADS5546IRGZT requirements.
6.How does Aetrix verify that ADS5546IRGZT is sourced from the original manufacturer or authorized distributors?
All ADS5546IRGZT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADS5546IRGZT meets industry standards.
7.What is the process for return or replacement of ADS5546IRGZT?
All ADS5546IRGZT units undergo pre-shipment inspection (PSI). If there is an issue with ADS5546IRGZT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADS5546IRGZT part is unused and in its original packaging.
Return procedure for ADS5546IRGZT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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