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Texas Instruments ADS58B19IRGZT

Part No.:
ADS58B19IRGZT
Manufacturer:
Texas Instruments
Category:
Analog to Digital Converters (ADC)
Package:
48-VFQFN Exposed Pad
Datasheet:
AetrixADS58B19IRGZT.pdf
Description:
IC ADC 9BIT PIPELINED 48VQFN
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:1,805

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Product details

Overview

ADS58B19IRGZT from Texas Instruments is a 9-bit, 250MSPS ultralow-power analog-to-digital converter with integrated high-impedance analog input buffer and DDR LVDS/CMOS digital interface. It delivers 55.7dBFS SNR and 76dBc SFDR at 150MHz input frequency, operates from 1.8V analog/digital supplies and 3.3V buffer supply, and targets wideband communications receiver chains requiring low power and high dynamic range.

For engineers reviewing the ADS58B19IRGZT datasheet, ADS58B19IRGZT pinout, ADS58B19IRGZT application, or ADS58B19IRGZT equivalent, key selection considerations include its 250MSPS sampling rate, SNR/SFDR trade-off via programmable gain, DC offset correction loop, low-swing LVDS output mode (200mV), and QFN-48 package compatibility with industrial temperature operation (–40°C to +85°C).

Technical Context

The ADS58B19IRGZT implements a pipelined ADC architecture with on-chip analog input buffers that maintain constant 4kΩ differential input impedance and 550MHz analog bandwidth across frequency. Its digital backend includes a DDR serializer supporting 500Mbps LVDS output and parallel CMOS mode with 1.8V logic levels.

It features a configurable serial interface (RESET/SCLK/SDATA/SEN) for register control, hardware-driven DC offset correction, and dynamic power scaling - reducing analog power to 258mW and I/O power to 69mW at full 250MSPS operation while preserving performance.

Key Specifications

Parameter Value and Actual Design Meaning
Resolution 9-bit - fixed resolution enabling high-speed digitization without interpolation or dithering overhead
Sampling Rate 250MSPS - supports Nyquist bandwidth up to 125MHz, suitable for direct IF sampling in LTE/WiMAX receivers
SNR @ 150MHz 55.7dBFS - measured signal-to-noise ratio defining minimum detectable signal level in wideband applications
SFDR @ 150MHz 76dBc - spurious-free dynamic range indicating ability to resolve small signals near large interferers
Analog Power 258mW at 250MSPS - total AVDD + AVDD_BUF consumption enabling thermal management in dense RF front ends
Digital Interface DDR LVDS (350mV or 200mV swing) or 1.8V CMOS - dual-mode output flexibility for FPGA or ASIC receiver integration
Input Bandwidth 550MHz - supports high-frequency analog inputs without external amplification or filtering degradation

Pinout & Package

ADS58B19IRGZT is housed in a thermally enhanced QFN-48 (7mm × 7mm) package with exposed PowerPAD™ connected to DRGND. Pin assignments are identical for LVDS and CMOS modes except for data pin multiplexing and CLKOUT configuration.

Pin/Terminal Circuit Role Design Meaning
INP / INM Differential analog input High-impedance buffered inputs accepting 1.5VPP differential signal; common-mode voltage set by internal VCM (1.7V)
CLKP / CLKM Differential clock input Accepts ac-coupled LVDS/LVPECL/LVCMOS clocks; supports 30–250MSPS with <1.5VPP amplitude requirement
D0_P / D0_M through D9_D10_P / D9_D10_M DDR LVDS data outputs Multiplexed 10-bit data (D0–D9) plus LSB of D10 on D9_D10 pair; 200mV or 350mV swing selectable
CLKOUTP / CLKOUTM DDR LVDS output clock Source-synchronous clock aligned to data edges; 50% duty cycle ±3% over full sampling rate range
RESET / SCLK / SDATA / SEN Serial interface control 4-wire SPI-compatible interface for configuration; RESET initializes registers, SEN pulls up to AVDD when unused
OE Output enable Active-high control for LVDS/CMOS output drivers; enables fast channel muting or power gating in multi-ADC systems

Key Features

Feature Design Value
Integrated analog input buffer Provides stable 4kΩ differential input impedance and 2.1pF capacitance up to 550MHz, eliminating need for external driver amplifiers
Dynamic power scaling Automatically reduces analog and digital supply currents at lower sampling rates without SNR/SFDR degradation
Programmable gain Adjusts full-scale input range to optimize SFDR at high input frequencies (e.g., >100MHz), improving linearity under wideband conditions
DC offset correction loop Hardware-accelerated closed-loop cancellation of ADC core offset, reducing calibration burden in production test and field operation
Low-swing LVDS mode Reduces I/O power by ~30% versus standard LVDS (200mV vs 350mV swing) while maintaining noise margin for short PCB traces

Applications

Direct IF Sampling Receiver PA Linearization Feedback Path

Use Scenario: Digitizing 70–150MHz IF signals in LTE base station transceivers without downconversion.

IC Role / Device Role / Timing Role: Primary ADC capturing wide instantaneous bandwidth for digital predistortion (DPD) engine input.

Use Value: 250MSPS sampling and 550MHz input bandwidth enable single-shot capture of 40MHz LTE carriers with guard bands; 55.7dBFS SNR ensures accurate error vector magnitude (EVM) measurement.

Use Scenario: Capturing feedback samples from power amplifier output to compute real-time DPD coefficients.

IC Role / Device Role / Timing Role: High-speed acquisition node synchronizing with transmit clock to minimize latency in adaptive DPD loops.

Use Value: 17-cycle ADC latency (with offset correction enabled) and DDR LVDS interface reduce round-trip delay below 70ns, critical for sub-1µs DPD update cycles.

Software-Defined Radio Front End Test & Measurement Digitizer Channel

Use Scenario: Multi-band SDR platform requiring reconfigurable ADC performance across 10–300MHz RF bands.

IC Role / Device Role / Timing Role: Reconfigurable digitizer with programmable gain, DC offset correction, and dual LVDS/CMOS interface for FPGA interfacing.

Use Value: Gain adjustment and dynamic power scaling allow optimization for sensitivity (low gain) or linearity (high gain); 250MSPS supports 120MHz instantaneous bandwidth per channel.

Use Scenario: Modular digitizer module in automated test equipment measuring spectral purity of RF components.

IC Role / Device Role / Timing Role: Precision acquisition element delivering calibrated SFDR and THD metrics for compliance verification.

Use Value: 76dBc SFDR at 150MHz and –86dBFS two-tone IMD support validation of amplifier harmonics and intermodulation products per IEEE 1057.

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed ADC applications.

Alternative Part Technical Difference Application Difference Selection Advice
ADS58B18IRGZT 11-bit, 200MSPS; includes SNRBoost technology for enhanced SNR in narrow bandwidths Better suited for applications requiring higher resolution over <20MHz bandwidths (e.g., radar pulse analysis) Select ADS58B18IRGZT when SNR >65dBFS in sub-Nyquist bands is mandatory; ADS58B19IRGZT offers higher speed and lower power for wideband use cases
AD9237BCPZ-250 12-bit, 250MSPS; no integrated analog buffer; requires external op-amp driver; JESD204B interface option Targeted at systems with existing high-performance analog signal conditioning and JESD204B-capable FPGAs Choose AD9237BCPZ-250 only if system already uses JESD204B infrastructure and can accommodate external buffering; ADS58B19IRGZT simplifies layout with integrated buffer and LVDS compatibility

Compared with ADS58B18IRGZT and AD9237BCPZ-250, ADS58B19IRGZT uniquely balances 250MSPS speed, 9-bit resolution, integrated analog buffering, and ultralow power (258mW analog + 69mW I/O) - making it optimal for space-constrained, thermally sensitive wideband receiver designs where driver complexity and power budget are critical constraints.

Availability

ADS58B19IRGZT is available at Aetrix Electronics and suitable for direct IF sampling receivers, PA linearization feedback paths, software-defined radio front ends, test & measurement digitizer channels, and broadband communications infrastructure requiring stable component supply and industrial temperature operation.

Supply support for ADS58B19IRGZT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and high-performance data conversion technologies.

The ADS58B19IRGZT belongs to TI's ultralow-power ADS4xxx ADC family, designed specifically for wideband communications infrastructure where analog buffering, dynamic power scaling, and high SFDR at 250MSPS are essential.

FAQ

What is the maximum analog input frequency supported by the ADS58B19IRGZT?

The ADS58B19IRGZT supports analog input frequencies up to 600MHz when using a 1VPP differential input amplitude, and up to 400MHz at full-scale 1.5VPP. Its 550MHz analog input bandwidth ensures minimal signal attenuation and phase distortion within this range, enabling direct sampling of IF signals in modern wireless infrastructure without external bandpass filtering.

Does the ADS58B19IRGZT require external analog input buffering?

No - the ADS58B19IRGZT integrates a high-impedance analog input buffer with constant 4kΩ differential resistance and 2.1pF capacitance across frequency. This eliminates the need for external driver amplifiers in most wideband receiver applications, reducing board area, power, and signal path complexity compared to bufferless ADCs like the AD9237.

What digital output interfaces does the ADS58B19IRGZT support?

The ADS58B19IRGZT supports two digital output modes: DDR LVDS (with programmable 200mV or 350mV swing and 100Ω termination) and 1.8V parallel CMOS. The LVDS interface operates at up to 500Mbps, while the CMOS mode supports up to 250MHz clock rates with 8pF load capacitance per pin - both configurable via the DFS pin.

How does the ADS58B19IRGZT handle DC offset correction?

The ADS58B19IRGZT includes a hardware-based DC offset correction loop that automatically measures and cancels ADC core offset during operation. Enabled by default after reset, it requires no host processor intervention and maintains accuracy across temperature and process variation - critical for zero-IF and direct-conversion architectures where residual DC offsets degrade EVM.

Is the ADS58B19IRGZT pin-compatible with the ADS58B18IRGZT?

Yes - the ADS58B19IRGZT and ADS58B18IRGZT share identical QFN-48 (RGZ) packaging, pinout, and power sequencing requirements. They differ only in internal ADC core resolution (9-bit vs 11-bit), maximum sampling rate (250MSPS vs 200MSPS), and presence of SNRBoost functionality (ADS58B18 only), allowing drop-in replacement in many layouts with firmware-level adjustments.

ADS58B19IRGZT Specifications

Product attributes
Attribute value
Manufacturer:
Texas Instruments
Series:
-
Package/Case:
48-VFQFN Exposed Pad
Packaging:
Tape & Reel (TR)
Product Status:
Active
Number of Bits:
9
Sampling Rate (Per Second):
250M
Number of Inputs:
1
Input Type:
Differential
Data Interface:
LVDS - Parallel, Parallel
Configuration:
S/H-ADC
Ratio - S/H:ADC:
1:1
Number of A/D Converters:
1
Architecture:
Pipelined
Reference Type:
Internal
Voltage - Supply, Analog:
1.7V ~ 1.9V
Voltage - Supply, Digital:
1.7V ~ 1.9V
Features:
-
Operating Temperature:
-40°C ~ 85°C
Supplier Device Package:
48-VQFN (7x7)
Mounting Type:
Surface Mount
Grade:
-
Qualification:
-

ADS58B19IRGZT FAQ

1.How can I place an order for ADS58B19IRGZT through Aetrix?

Please submit a Request for Quotation (RFQ) for ADS58B19IRGZT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ADS58B19IRGZT reliable?

The price and inventory of ADS58B19IRGZT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADS58B19IRGZT is usually 5 days.

3.What payment methods are accepted for ADS58B19IRGZT?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADS58B19IRGZT transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ADS58B19IRGZT?

ADS58B19IRGZT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ADS58B19IRGZT order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ADS58B19IRGZT?

For technical support, including ADS58B19IRGZT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADS58B19IRGZT requirements.

6.How does Aetrix verify that ADS58B19IRGZT is sourced from the original manufacturer or authorized distributors?

All ADS58B19IRGZT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADS58B19IRGZT meets industry standards.

7.What is the process for return or replacement of ADS58B19IRGZT?

All ADS58B19IRGZT units undergo pre-shipment inspection (PSI). If there is an issue with ADS58B19IRGZT, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ADS58B19IRGZT part is unused and in its original packaging.

Return procedure for ADS58B19IRGZT:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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