Texas Instruments ADS6122IRHBR
- Part No.:
- ADS6122IRHBR
- Manufacturer:
- Texas Instruments
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
ADS6122IRHBR.pdf
- Description:
- IC ADC 12BIT PIPELINED 32VQFN
- Quantity:
- Payment:

- Shipping:

Inventory:4,047
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Product details
Overview
ADS6122IRHBR from Texas Instruments is a 12-bit, 65 MSPS analog-to-digital converter (ADC) in a 32-pin QFN package, featuring DDR LVDS or parallel CMOS outputs, programmable coarse/fine gain (3.5 dB + up to 6 dB), and internal reference with external reference support. It delivers 71.6 dBFS SINAD and 95 dBc SFDR at 10 MHz input, targeting high-fidelity digitization in wireless infrastructure and radar front-ends.
For engineers reviewing the ADS6122IRHBR datasheet, ADS6122IRHBR pinout, ADS6122IRHBR application, or ADS6122IRHBR equivalent, key selection considerations include its 65 MSPS sampling rate, dual-output interface flexibility, 3.3 V analog / 1.8–3.3 V digital supply compatibility, industrial temperature range (–40°C to 85°C), and QFN-32 thermal performance (θJA = 34 °C/W).
Technical Context
The ADS6122IRHBR employs a high-bandwidth sample-and-hold circuit and low-jitter clock buffer to maintain 69.8 dBFS SINAD at 170 MHz input with 3.5 dB coarse gain. Its architecture supports both serial (3-wire) and parallel pin-based configuration for output format (LVDS/CMOS), gain, reference mode, and data format.
It integrates a clock duty cycle stabilizer, programmable output clock position and drive strength, and internal termination for LVDS outputs-enabling robust data capture without external components. The device achieves 0.7 ns aperture delay and 150 fs rms jitter, critical for undersampling and wideband IF digitization.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit with no missing codes - guarantees monotonicity and full code coverage across temperature. |
| Max Sampling Rate | 65 MSPS - defines maximum real-time bandwidth for Nyquist-sampled baseband or IF signals. |
| SINAD @ 10 MHz | 71.6 dBFS - quantifies effective dynamic range for low-frequency signal fidelity. |
| SFDR @ 10 MHz | 95 dBc - indicates spurious-free performance critical for multi-tone RF receiver linearity. |
| Analog Input BW | 450 MHz - supports direct sampling of UHF and L-band signals without external filtering. |
| Power Consumption | 285 mW (CMOS), 400 mW (LVDS) - enables low-power system design in thermally constrained enclosures. |
| Supply Voltages | AVDD = 3.3 V ±10%; DRVDD = 1.8–3.3 V - allows flexible I/O voltage scaling for FPGA/ASIC interfacing. |
Pinout & Package
ADS6122IRHBR is housed in a 5 mm × 5 mm, 32-pin QFN package (RHB) with exposed thermal pad. Pin functions are validated per TI SLAS560A datasheet Figure 1 and Table 1–3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| INP / INM | Differential analog input | Accepts 2 VPP differential signal; common-mode voltage fixed at 1.5 V in internal reference mode. |
| CLKP / CLKM | Differential clock input | Supports sine, LVPECL, LVDS, LVCMOS; minimum amplitude 400 mVPP differential. |
| VCM | Common-mode reference | Output-only pin; provides 1.5 V bias for external ADC driver stage when using external reference. |
| CLKOUTP / CLKOUTM | DDR LVDS output clock | Source-synchronous clock for LVDS data capture; programmable phase alignment relative to data. |
| D0_D1_P to D10_D11_M | DDR LVDS data pairs | 6 double-data-rate pairs (12-bit bus); each pair carries even/odd bits on rising/falling edges of CLKOUT. |
| SCLK / SEN / SDATA | Serial interface control | 3-wire SPI-compatible interface for register programming; also configurable as parallel control pins. |
| PDN | Power-down control | Four-level standby/power-down states: normal, ADC-only standby, output buffer disable, global power-down. |
Key Features
| Feature | Design Value |
|---|---|
| Programmable coarse/fine gain | 3.5 dB coarse + 0–6 dB fine gain improves SFDR at reduced full-scale input (e.g., 1.34 VPP), enabling optimal ADC utilization in noise-limited systems. |
| DDR LVDS or parallel CMOS outputs | Dual interface support reduces FPGA I/O count (LVDS) or simplifies timing closure (CMOS), with programmable drive strength for varying load capacitance. |
| Internal reference with no external decoupling | Integrated 1 V–2 V reference eliminates external reference IC and bypass capacitors, reducing BOM count and PCB area. |
| Parallel pin configuration | Direct hardware setup of LVDS/CMOS, internal/external reference, and data format avoids boot-time serial programming-critical for deterministic startup. |
| Clock duty cycle stabilizer | Compensates for input clock asymmetry, ensuring stable sampling aperture and minimizing harmonic distortion in high-speed sampling. |
Applications
| Wireless Infrastructure Baseband | Software Defined Radio (SDR) |
|---|---|
Use Scenario: Digitizing IF signals in macrocell BTS receivers operating at 70–180 MHz with 20 MHz channel bandwidth. IC Role / Device Role / Timing Role: Primary ADC capturing complex baseband I/Q streams; synchronized via DDR LVDS to FPGA fabric with <2.5 ns setup/hold margin. Use Value: 95 dBc SFDR at 10 MHz ensures adjacent-channel interference rejection >80 dB; 65 MSPS supports 3G/4G LTE 20 MHz channel bandwidth with oversampling headroom. | Use Scenario: Reconfigurable front-end in military SDR transceivers requiring rapid mode switching between narrowband HF and wideband UHF bands. IC Role / Device Role / Timing Role: High-linearity ADC for direct-conversion receiver path; configured via parallel pins for zero-latency mode changes. Use Value: Programmable 3.5 dB coarse gain maintains SNR >69 dBFS across 10–230 MHz input while avoiding ADC saturation during frequency hopping. |
| Radar System Digitizer | Test & Measurement Instrumentation |
Use Scenario: Pulse-Doppler radar intermediate frequency digitization at 100–200 MHz center frequency with 50 MHz instantaneous bandwidth. IC Role / Device Role / Timing Role: High-SFDR ADC feeding FPGA-based pulse compression and Doppler FFT processing; uses internal reference for stable gain calibration. Use Value: 84 dBc SFDR at 170 MHz (3.5 dB gain) enables detection of weak targets masked by clutter; 450 MHz analog bandwidth supports direct IF sampling without image-reject filters. | Use Scenario: Modular digitizer module in automated test equipment (ATE) handling multi-standard RF signal analysis (Wi-Fi, Bluetooth, Zigbee). IC Role / Device Role / Timing Role: Precision ADC in calibrated measurement path; leverages no-missing-codes guarantee and ±1 LSB INL for traceable amplitude accuracy. Use Value: 71.6 dBFS SINAD and ±1 LSB INL meet Class A instrument requirements for ENOB ≥11.5 bits; 32-QFN package supports compact multi-channel board layout. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS6123IRHBR | 80 MSPS max sampling rate; 318 mW power; 93 dBc SFDR @10 MHz | Higher sample rate supports wider instantaneous bandwidth (e.g., 40 MHz LTE channels) | Select when system requires >65 MSPS but retains same pinout, interface, and feature set. |
| ADS5272IPFP | 12-bit, 65 MSPS, 6-channel interleaved; 1.8 V supply only; LVDS-only output | Multi-channel synchronization capability; no CMOS output option | Choose for time-interleaved multi-ADC architectures where channel matching and deterministic latency are critical. |
Compared with ADS6123IRHBR and ADS5272IPFP, the ADS6122IRHBR offers lowest power (285 mW) and highest SFDR (95 dBc) at 65 MSPS, making it optimal for single-channel, power-sensitive, high-dynamic-range applications where pin compatibility and dual-output flexibility are required.
Availability
ADS6122IRHBR is available at Aetrix Electronics and suitable for wireless infrastructure, radar systems, and test instrumentation requiring stable component supply, long-term obsolescence management, and guaranteed authentic sourcing from Texas Instruments.
Supply support for ADS6122IRHBR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and high-performance data converters for industrial, automotive, and communications markets.
The ADS612X family-including ADS6122IRHBR-is designed for high-dynamic-range, medium-speed digitization in RF receiver chains, emphasizing low power, flexible interface options, and simplified system integration through integrated references and clock conditioning.
FAQ
What is the maximum sampling rate supported by the ADS6122IRHBR?
The ADS6122IRHBR supports a maximum sampling rate of 65 MSPS, as specified in the SLAS560A datasheet. This rate is guaranteed across the full industrial temperature range (–40°C to 85°C) with AVDD = DRVDD = 3.3 V and proper clock signal integrity. Exceeding this rate may result in degraded AC performance including reduced SFDR and increased aperture jitter.
Does the ADS6122IRHBR require external decoupling capacitors for its internal reference?
No, the ADS6122IRHBR does not require external decoupling capacitors for its internal reference. As stated in the datasheet, the device eliminates traditional reference pins and associated external decoupling, integrating a stable 1 V–2 V internal reference. This reduces PCB footprint and BOM cost while maintaining ±5 mV reference error over temperature.
Can the ADS6122IRHBR operate with a 1.8 V digital supply voltage?
Yes, the ADS6122IRHBR supports DRVDD from 1.8 V to 3.3 V, enabling direct interfacing with 1.8 V FPGA I/O banks. At 1.8 V DRVDD, the CMOS output drive strength is reduced, and LVDS operation is not supported-only CMOS mode is functional. Power consumption drops to 285 mW (CMOS) under these conditions.
What output interface modes does the ADS6122IRHBR support?
The ADS6122IRHBR supports two output interface modes: DDR LVDS and parallel CMOS. Mode selection is configurable via the SEN pin in parallel control mode or register 0x00 in serial mode. DDR LVDS uses six differential pairs for 12-bit data plus CLKOUTP/CLKOUTM, while CMOS uses 12 single-ended outputs with a separate CLKOUT.
Is the ADS6122IRHBR pin-compatible with other devices in the ADS612X family?
Yes, the ADS6122IRHBR is pin-compatible with ADS6123IRHBR, ADS6124IRHBR, and ADS6125IRHBR within the ADS612X family. All share the identical 32-pin QFN (RHB) package, identical pinout, and compatible power/ground/bias connections-enabling drop-in upgrades to higher sampling rates without PCB redesign.
ADS6122IRHBR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 32-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 65M
- Number of Inputs:
- 1
- Input Type:
- Differential
- Data Interface:
- LVDS - Parallel, Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- Pipelined
- Reference Type:
- Internal
- Voltage - Supply, Analog:
- 3V ~ 3.6V
- Voltage - Supply, Digital:
- 1.65V ~ 3.6V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 32-VQFN (5x5)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
ADS6122IRHBR FAQ
1.How can I place an order for ADS6122IRHBR through Aetrix?
Please submit a Request for Quotation (RFQ) for ADS6122IRHBR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADS6122IRHBR reliable?
The price and inventory of ADS6122IRHBR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADS6122IRHBR is usually 5 days.
3.What payment methods are accepted for ADS6122IRHBR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADS6122IRHBR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADS6122IRHBR?
ADS6122IRHBR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADS6122IRHBR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADS6122IRHBR?
For technical support, including ADS6122IRHBR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADS6122IRHBR requirements.
6.How does Aetrix verify that ADS6122IRHBR is sourced from the original manufacturer or authorized distributors?
All ADS6122IRHBR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADS6122IRHBR meets industry standards.
7.What is the process for return or replacement of ADS6122IRHBR?
All ADS6122IRHBR units undergo pre-shipment inspection (PSI). If there is an issue with ADS6122IRHBR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADS6122IRHBR part is unused and in its original packaging.
Return procedure for ADS6122IRHBR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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