Texas Instruments ADS6125IRHBTG4
- Part No.:
- ADS6125IRHBTG4
- Manufacturer:
- Texas Instruments
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
ADS6125IRHBTG4.pdf
- Description:
- IC ADC 12BIT SER/PAR 125M 32VQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ADS6125IRHBTG4 from Texas Instruments is a 12-bit, 125 MSPS analog-to-digital converter with DDR LVDS or parallel CMOS outputs, 3.5 dB coarse gain and programmable fine gain up to +6 dB, internal reference, and 32-pin QFN (5 mm × 5 mm) package. It delivers 71.1 dBFS SINAD at 170 MHz input with 3.5 dB gain and consumes 417 mW total power, targeting high-speed data acquisition in wireless infrastructure and radar systems.
For engineers reviewing the ADS6125IRHBTG4 datasheet, ADS6125IRHBTG4 pinout, ADS6125IRHBTG4 application, or ADS6125IRHBTG4 equivalent, key selection considerations include its 125 MSPS sampling rate, dual-output interface flexibility (LVDS/CMOS), clock amplitude support down to 400 mVPP, duty cycle stabilizer, and industrial temperature range (–40°C to 85°C).
Technical Context
The ADS6125IRHBTG4 employs a high-bandwidth sample-and-hold circuit and low-jitter clock buffer to maintain 78 dBc SFDR at 170 MHz input with 3.5 dB coarse gain. Its digital interface supports both DDR LVDS (3.3 V DRVDD, 3.5 mA current, 100 Ω load) and parallel CMOS (1.8–3.3 V DRVDD), with programmable output clock position and drive strength for timing margin optimization.
Configuration is achieved via 3-wire serial interface (SEN/SCLK/SDATA) or dedicated parallel pins for power-up state control. Internal reference eliminates external decoupling requirements, while external reference mode supports 1.45–1.55 V common-mode voltage on VCM pin - both modes validated across –40°C to 85°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Sampling Rate | 125 MSPS maximum - enables digitization of wideband RF signals up to Nyquist frequency of 62.5 MHz. |
| Resolution | 12 bits with no missing codes - guarantees monotonic transfer function and deterministic code transitions. |
| SINAD | 71.1 dBFS at Fin = 170 MHz, 3.5 dB gain - defines usable dynamic range for high-frequency signal capture. |
| Power Consumption | 417 mW total (AVDD + DRVDD) at 125 MSPS - balances performance and thermal management in dense PCB layouts. |
| Analog Input Bandwidth | 450 MHz - supports undersampling of IF signals without aliasing in SDR and radar front-ends. |
| Differential Input Range | 2 VPP - sets full-scale swing for optimal SNR with transformer-coupled or balun-based signal chains. |
| Output Interface | DDR LVDS or parallel CMOS - provides layout flexibility: LVDS reduces EMI and skew at high speeds; CMOS simplifies FPGA interfacing. |
Pinout & Package
ADS6125IRHBTG4 is housed in a 32-pin QFN package (5 mm × 5 mm) with exposed thermal pad, θJA = 34 °C/W (0 LFM), and JEDEC-standard 4-layer PCB mounting requirements.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| INP / INM | Differential analog input | Accepts 2 VPP differential signal; 450 MHz bandwidth supports IF sampling; common-mode voltage fixed at 1.5 V in internal reference mode. |
| CLKP / CLKM | Differential clock input | Supports sine, LVPECL, LVDS, or LVCMOS clocks; minimum amplitude 400 mVPP; includes duty cycle stabilizer. |
| VCM | Reference common-mode voltage | 1.5 V output in internal reference mode; used as input bias point in external reference mode (1.45–1.55 V). |
| CLKOUTP / CLKOUTM | DDR LVDS output clock | Source-synchronous clock for DDR LVDS data capture; programmable phase position relative to data edges. |
| D0_D1_P through D10_D11_M | DDR LVDS data pairs | 6 differential pairs carrying 12-bit data at double-data-rate; each pair transmits even/odd bit pairs (e.g., D0/D1) simultaneously. |
| D0–D11 | Parallel CMOS data outputs | 12 single-ended outputs active in CMOS mode; drive strength programmable for CLOAD ≤5 pF or >5 pF. |
| SEN / SCLK / SDATA | Serial configuration interface | 3-wire SPI-compatible bus for register programming; also serve as parallel control pins when RESET = AVDD. |
| PDN | Power-down control | Selects standby (ADC off), output buffer off, or global power-down (ADC + ref + buffers); wake-up times specified per mode. |
| AVDD / AGND | Analog supply | 3.0–3.6 V analog rail; supplies core ADC and reference; PSRR = 35 dB against 100 mVPP noise on AVDD. |
| DRVDD / DRGND | Digital output supply | 1.8–3.3 V for CMOS; 3.0–3.6 V for LVDS; independent from AVDD to isolate digital switching noise. |
Key Features
| Feature | Design Value |
|---|---|
| Programmable coarse/fine gain | 3.5 dB coarse gain + up to +6 dB fine gain improves SFDR at reduced full-scale inputs without external amplifiers. |
| Internal reference with no external decoupling | Eliminates two reference bypass capacitors and associated PCB area; VREFB = 1 V, VREFT = 2 V, ΔVREF = ±5 mV. |
| DDR LVDS and parallel CMOS output options | Enables migration between high-noise immunity (LVDS) and FPGA-friendly (CMOS) interfaces without hardware change. |
| Programmable output clock position | Adjusts CLKOUT phase relative to data valid window to maximize setup/hold margins in high-speed capture systems. |
| Input clock amplitude down to 400 mVPP | Reduces need for clock buffer amplification in low-power or space-constrained RF front-ends. |
Applications
| Wireless Communications Infrastructure | Software Defined Radio (SDR) |
|---|---|
Use Scenario: Digitizing 20–40 MHz IF signals in LTE base station receivers with 120 MHz instantaneous bandwidth. IC Role / Device Role / Timing Role: High-speed ADC capturing wideband RF channel data; synchronized via LVDS output clock to FPGA processing pipeline. Use Value: 78 dBc SFDR at 170 MHz ensures clean adjacent-channel rejection; 125 MSPS sampling supports 60+ MHz real-time bandwidth. | Use Scenario: Reconfigurable radio platform requiring flexible sampling rates and interface modes across multiple waveforms. IC Role / Device Role / Timing Role: Configurable ADC enabling rapid waveform switching via serial interface; CMOS/LVDS mode selected at boot via parallel pins. Use Value: Pin-compatible family allows hardware reuse; programmable gain and clock position simplify calibration across bands. |
| Power Amplifier Linearization | Radar Systems |
Use Scenario: Capturing PA output for digital predistortion (DPD) feedback path in microwave backhaul transmitters. IC Role / Device Role / Timing Role: High-SFDR ADC sampling PA output at IF to extract distortion components for real-time correction. Use Value: 90 dBc SFDR at 10 MHz enables accurate modeling of 3rd/5th harmonics; internal reference ensures stable gain over temperature. | Use Scenario: Pulse-Doppler radar receiver digitizing 1–2 GHz IF signals using undersampling technique. IC Role / Device Role / Timing Role: Wide-input-bandwidth ADC operating in undersampling mode; clocked by stable local oscillator. Use Value: 450 MHz analog input bandwidth permits direct sampling of 1.8 GHz IF; 12-bit resolution preserves target detection SNR. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS6124IRHBT | 105 MSPS max sampling rate; 374 mW power; 71.3 dBFS SINAD at 170 MHz (3.5 dB gain) | Lower sampling rate suits cost-sensitive SDR or test equipment where 125 MSPS is not required | Select when system bandwidth < 52.5 MHz and power budget is tighter |
| ADS5272IPFP | 12-bit, 65 MSPS, 64-pin HTQFP; LVDS-only output; 300 mW power; 70.5 dBFS SINAD at 170 MHz | Larger package and lower speed limit use in space-tolerant industrial instrumentation | Choose for legacy LVDS-only designs with board real estate margin and relaxed timing constraints |
Compared with ADS6124IRHBT and ADS5272IPFP, ADS6125IRHBTG4 delivers highest sampling throughput and SFDR at 170 MHz among pin-compatible ADS612X family members, making it optimal for next-generation wireless infrastructure where spectral purity and bandwidth are critical.
Availability
ADS6125IRHBTG4 is available at Aetrix Electronics and suitable for wireless infrastructure, radar systems, and software-defined radio applications requiring stable component supply, long-term production continuity, and guaranteed industrial temperature grade performance.
Supply support for ADS6125IRHBTG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions with emphasis on reliability, precision, and energy efficiency.
The ADS612X product line was designed specifically for high-speed, high-dynamic-range data acquisition in communications and instrumentation systems, balancing 12-bit resolution, 65–125 MSPS sampling, and low-power QFN packaging.
FAQ
What is the maximum sampling rate supported by ADS6125IRHBTG4?
The ADS6125IRHBTG4 supports a maximum sampling rate of 125 MSPS, as confirmed in the device's datasheet absolute maximum ratings and electrical characteristics tables. This rate is achievable across the full industrial temperature range (–40°C to 85°C) with AVDD = DRVDD = 3.3 V and proper clock conditioning. At this rate, the ADC maintains 71.1 dBFS SINAD and 78 dBc SFDR at 170 MHz input with 3.5 dB coarse gain. The ADS6125IRHBTG4 is the top-speed member of the pin-compatible ADS612X family.
Does ADS6125IRHBTG4 require external decoupling capacitors for its internal reference?
No, ADS6125IRHBTG4 does not require external decoupling capacitors for its internal reference. The datasheet explicitly states "No External Decoupling Required for References" under Features and confirms this in the Electrical Characteristics section, where VREFB and VREFT are specified with ±5 mV error over temperature. This eliminates two 10 µF ceramic capacitors typically needed for reference stability, reducing BOM count and PCB area - a verified design advantage for compact RF modules.
What output interface options does ADS6125IRHBTG4 support?
ADS6125IRHBTG4 supports two mutually exclusive digital output interfaces: DDR LVDS and parallel CMOS. LVDS mode requires DRVDD = 3.3 V and delivers data on six differential pairs (D0_D1_P/M through D10_D11_P/M) with source-synchronous CLKOUTP/M. CMOS mode supports DRVDD = 1.8–3.3 V and outputs 12 single-ended signals (D0–D11). Interface selection is controlled either via parallel pins (SEN/SCLK) at power-up or through serial register 0x04 - both methods are fully documented and validated for ADS6125IRHBTG4.
Can ADS6125IRHBTG4 operate with a 400 mVPP differential clock input?
Yes, ADS6125IRHBTG4 supports differential clock input amplitudes as low as 400 mVPP, as specified in the Recommended Operating Conditions table. This applies to all supported clock types - sine, LVPECL, LVDS, and LVCMOS - and is verified across the full temperature range. The integrated clock buffer and duty cycle stabilizer ensure robust sampling jitter performance (<150 fs rms) even at this minimum amplitude, enabling direct connection to low-power clock sources without intermediate amplification.
What is the analog input bandwidth of ADS6125IRHBTG4?
The analog input bandwidth of ADS6125IRHBTG4 is 450 MHz, as measured from the –3 dB point of the small-signal frequency response. This specification is confirmed in the Electrical Characteristics table and enables undersampling applications such as direct IF digitization in radar and broadband communications. The 450 MHz bandwidth is maintained across the full industrial temperature range and supports differential input signals up to 2 VPP with 71.1 dBFS SINAD at 170 MHz input frequency.
ADS6125IRHBTG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 32-VFQFN Exposed Pad
- Packaging:
- Bulk
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 125M
- Number of Inputs:
- 1
- Input Type:
- Differential
- Data Interface:
- LVDS - Parallel, Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- Pipelined
- Reference Type:
- Internal
- Voltage - Supply, Analog:
- 3V ~ 3.6V
- Voltage - Supply, Digital:
- 1.65V ~ 3.6V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 32-VQFN (5x5)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
ADS6125IRHBTG4 FAQ
1.How can I place an order for ADS6125IRHBTG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for ADS6125IRHBTG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADS6125IRHBTG4 reliable?
The price and inventory of ADS6125IRHBTG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADS6125IRHBTG4 is usually 5 days.
3.What payment methods are accepted for ADS6125IRHBTG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADS6125IRHBTG4 transactions.
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4.How is shipping managed for ADS6125IRHBTG4?
ADS6125IRHBTG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADS6125IRHBTG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADS6125IRHBTG4?
For technical support, including ADS6125IRHBTG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADS6125IRHBTG4 requirements.
6.How does Aetrix verify that ADS6125IRHBTG4 is sourced from the original manufacturer or authorized distributors?
All ADS6125IRHBTG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADS6125IRHBTG4 meets industry standards.
7.What is the process for return or replacement of ADS6125IRHBTG4?
All ADS6125IRHBTG4 units undergo pre-shipment inspection (PSI). If there is an issue with ADS6125IRHBTG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADS6125IRHBTG4 part is unused and in its original packaging.
Return procedure for ADS6125IRHBTG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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