Texas Instruments ADS6143EVM

Overview

ADS6143EVM from Texas Instruments is an evaluation module designed to characterize the ADS6143 - a 14-bit, 65-MSPS low-power analog-to-digital converter - under configurable analog input, clock, and supply conditions. It supports CMOS parallel output, offset-binary data format, and offers dual analog input paths (transformer-coupled or THS4509-based differential amplification) with selectable gain and reference modes.

For engineers reviewing the ADS6143EVM datasheet, ADS6143EVM pinout, ADS6143EVM application, or ADS6143EVM equivalent, this module enables rapid performance validation of high-speed ADCs in test benches, FPGA-based capture systems (TSW1100/TSW1200), and SPI-controlled configuration environments - with emphasis on SNR, SFDR, and coherent sampling setup.

Technical Context

The ADS6143EVM implements a four-layer FR-4 PCB layout with split ground and power planes, supporting both ac- and dc-coupled analog signal paths. It integrates a transformer-based single-ended-to-differential front-end and an optional THS4509 amplifier path with configurable common-mode biasing via J20/J16 rails or ADC VCM.

Clock conditioning includes dual input options: a transformer-coupled single-ended path (J9) and a CDCP1803-based LVDS fanout path (1:3 distribution), with jumper-selectable routing (JP2–JP4). Digital interface uses a Samtec QSO-060-01-F-D-A connector (J10) for parallel CMOS outputs aligned to ADS6143's 14-bit data bus (D0–D13).

Key Specifications

Availability

ADS6143EVM is available at Aetrix Electronics and suitable for high-speed ADC evaluation, FPGA-based data capture system development, and precision analog test bench integration requiring stable component supply and documented TI reference design support.

Supply support for ADS6143EVM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company specializing in analog, embedded processing, and high-performance data conversion technologies.

The ADS6143EVM belongs to TI's high-speed data converter evaluation platform family, engineered to accelerate characterization and system integration of precision ADCs in communications, instrumentation, and medical imaging applications.

FAQ

What is the primary function of the ADS6143EVM?

The ADS6143EVM is a dedicated evaluation module for the ADS6143 14-bit, 65-MSPS analog-to-digital converter. It provides hardware infrastructure - including configurable analog input paths, clock conditioning, parallel CMOS digital output, and SPI control interface - to validate ADC performance metrics such as SNR, SFDR, and THD under real-world signal, reference, and supply conditions. The ADS6143EVM itself is not an IC but a test platform enabling full functional and dynamic characterization of the ADS6143.

Which ADC does the ADS6143EVM specifically support?

The ADS6143EVM is explicitly designed and validated for the ADS6143, as confirmed in the SLAU206B User's Guide title, overview, and circuit description sections. While the board shares mechanical and interface compatibility with other ADS61xx/ADS61B23 family members (e.g., ADS6142/44/45), its default configuration, jumper settings, and documentation focus are optimized for ADS6143 operation - including its 14-bit resolution, 65-MSPS sample rate, and specific register map usage.

How is digital data captured from the ADS6143EVM?

Digital output from the ADS6143EVM is accessed via J10 - a high-density Samtec QSO-060-01-F-D-A connector carrying the ADS6143's 14-bit parallel CMOS data bus (D0–D13), clock, and ground lines. Users can capture data using a compatible logic analyzer breakout board (per Table 1 in SLAU206B), TI's TSW1100 capture board (with proper firmware update), or a custom FPGA interface board designed to mate with that Samtec connector. No onboard memory or streaming controller is included - raw parallel output requires external capture hardware.

Does the ADS6143EVM support SPI configuration of the ADS6143?

Yes, the ADS6143EVM supports full SPI register access to the ADS6143 via its integrated USB interface and TI ADC SPI Control Software. Enabling SPI mode requires reconfiguring jumpers J2, J3, J6, and J7 to USB/FPGA control positions and supplying 5 V to J20. Once configured, users can write to any ADS6143 register - including data format, power-down, course gain, and reference selection - using the GUI or script-based commands. This capability is essential for evaluating non-default ADS6143 operating modes beyond the factory-set parallel CMOS configuration.

Can the ADS6143EVM be used with FPGA development platforms?

Yes, the ADS6143EVM is natively compatible with TI's TSW1100 and TSW1200 FPGA-based capture platforms. For TSW1100, users connect via the CMOS breakout board to Channel 2 and update the Supported_ADCs.txt file. For TSW1200, direct plug-in is supported, and the Virtex-4 FPGA can be reprogrammed for custom deserialization or SPI control - provided surface-mount jumpers (e.g., JP7, R62–R64) and J3 are set per Section 4.2 of SLAU206B. This FPGA integration enables real-time data streaming, protocol translation, and closed-loop ADC control without external logic analyzers.