Texas Instruments ADS6144EVM

Overview

ADS6144EVM from Texas Instruments is an evaluation module designed to characterize the ADS6144 14-bit, 40-MSPS analog-to-digital converter under controlled analog input, clock, and supply conditions. It supports CMOS parallel output (14-bit offset binary), transformer-coupled or THS4509-amplified differential input paths, and dual-clocking options via SMA J9 (transformer) or CDCP1803 LVDS fanout. The EVM enables high-fidelity SNR and SFDR measurement for RF receiver and instrumentation signal chain validation.

For engineers reviewing the ADS6144EVM datasheet, ADS6144EVM pinout, ADS6144EVM application, or ADS6144EVM equivalent, this page provides verified hardware configuration details, jumper-defined operational modes (parallel/serial, CMOS/LVDS, internal/external reference), breakout board interface mapping, FPGA integration guidance (TSW1100/TSW1200), and ADC SPI control software setup - all critical for rapid ADC performance validation and system-level timing analysis.

Technical Context

The ADS6144EVM implements a four-layer FR-4 PCB with split ground plane and dedicated analog/digital power domains (3.3 V digital buffer at J11, 3.3 V analog at J13, shorted by default via R65). It supports both ac-coupled (transformer T1/T2) and dc-coupled (THS4509 amplifier path enabled via JP5/JP6/JP7) analog input configurations, with configurable common-mode biasing via ADC VCM or external rail supplies (J16/J20).

Clock distribution includes dual paths: single-ended SMA J9 → transformer T3 → differential ADC CLK, or low-jitter LVDS fanout via CDCP1803 (enabled by JP2/JP3/JP4) for multi-ADC synchronization. Digital outputs are routed to a Samtec QSO-060-01-F-D-A connector (J10) supporting logic analyzer capture or direct FPGA interfacing, with optional drive-strength boosting via TI SPI Control Software for TSW1100 compatibility.

Key Specifications

Availability

ADS6144EVM is available at Aetrix Electronics and suitable for high-speed data acquisition systems, RF receiver prototyping, and test equipment development requiring stable component supply, traceable evaluation hardware, and documented ADC characterization workflows.

Supply support for ADS6144EVM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company specializing in analog, embedded processing, and high-performance data converters, with leadership in precision and high-speed ADC/DAC design.

The ADS61xx EVM series was developed to accelerate evaluation of TI's low-power, high-resolution pipeline ADCs-including the ADS6144-targeting communications infrastructure, medical imaging, and automated test equipment where SNR, SFDR, and coherent sampling fidelity are critical.

FAQ

What is the primary function of the ADS6144EVM?

The ADS6144EVM is a dedicated evaluation platform for the ADS6144 14-bit, 40-MSPS analog-to-digital converter. It provides configurable analog input paths (transformer or THS4509 amplifier), dual clock routing (SMA J9 or CDCP1803 LVDS), parallel CMOS digital output via Samtec connector J10, and full SPI register control via USB. Its purpose is to enable accurate measurement of key ADC performance metrics-including SNR, SFDR, and ENOB-under real-world signal, reference, and supply conditions. The ADS6144EVM does not operate as a standalone data acquisition system but serves exclusively as a characterization tool for the ADS6144 IC.

Which ADC models does the ADS6144EVM support besides the ADS6144?

The ADS6144EVM is part of the unified ADS61xx/ADS61B23 EVM platform and supports multiple members of the family: ADS6122, ADS6123, ADS6124, ADS6125, ADS6142, ADS6143, ADS6144, ADS6145, and ADS61B23. All share identical PCB layout, jumper architecture, and interface provisions. Configuration for each variant is achieved via hardware jumpers (J1–J7, JP1–JP8) and software register settings. The ADS6144EVM user guide explicitly confirms compatibility across this full set, with no mechanical or electrical modifications required to evaluate any listed device.

How do I configure the ADS6144EVM for CMOS parallel output mode?

To configure the ADS6144EVM for CMOS parallel output, set jumper J1 to positions 5–6 (labeled "Offset Binary, CMOS output" on silkscreen), ensure J3 is shorted at 2–3 for parallel mode, and confirm J4 is at 1–2 for internal reference. The ADS6144 defaults to CMOS offset binary output when powered; no SPI register writes are needed for basic operation. Digital outputs appear on Samtec connector J10 pins 10–32 (data bits 0–13 MSB), with timing referenced to CLK on pin 2. For TSW1100 capture, use the companion breakout board per Table 1 in SLAU206B and verify drive strength if signal integrity degrades.

Can the ADS6144EVM be used with FPGA development platforms?

Yes, the ADS6144EVM integrates directly with two TI FPGA platforms: it natively connects to the TSW1200 via its Samtec interface, and interfaces with the TSW1100 using the included CMOS breakout board. For TSW1100, users must update the Supported_ADCs.txt file with the version provided on the ADS61xx software CD and configure the ADS6144EVM for CMOS output mode. For FPGA-controlled SPI operation (e.g., Virtex-4 on TSW1200), surface-mount jumpers and resistor replacements (R7/R18/R19/R20/R62–R64) are required per Section 4.2 of SLAU206B to route SEN, SCLK, and SDATA to FPGA GPIOs while placing the ADS6144 in serial mode via J3.

What software is required to control the ADS6144 via the ADS6144EVM?

The TI ADC SPI Control Software is required for full register-level control of the ADS6144 via the ADS6144EVM's USB interface. This Windows-based GUI allows SPI register writes (address/data in hex/binary/decimal), script-based batch programming, and one-click configuration of frequently used features like reset, output format, reference selection, and course gain. Installation requires running setup.exe from the included CD before connecting the USB cable to load drivers. The software communicates only when the ADS6144 is in serial mode (J3 = 1–2) and USB control is enabled (J2/J6/J7 = 1–2). For basic parallel-mode evaluation, no software is needed.