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Texas Instruments ADS62P23IRGCT

Part No.:
ADS62P23IRGCT
Manufacturer:
Texas Instruments
Category:
Analog to Digital Converters (ADC)
Package:
64-VFQFN Exposed Pad
Datasheet:
AetrixADS62P23IRGCT.pdf
Description:
IC ADC 12BIT PIPELINED 64VQFN
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:1,910

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Product details

Overview

ADS62P23IRGCT from Texas Instruments is a dual-channel, 12-bit analog-to-digital converter with 80 MSPS maximum sampling rate, DDR LVDS or parallel CMOS outputs, and integrated digital processing block including decimation (×2/4/8), 24-tap programmable filters, and fine gain correction in 0.05 dB steps. It operates over –40°C to 85°C and targets high-fidelity signal acquisition in software-defined radio baseband receivers.

For engineers reviewing the ADS62P23IRGCT datasheet, ADS62P23IRGCT pinout, ADS62P23IRGCT application, or ADS62P23IRGCT equivalent, this page delivers verified specifications, package-validated pin functions, real-world use cases in wireless infrastructure, and two confirmed alternative parts with documented functional and application-level differences.

Technical Context

The ADS62P23IRGCT implements a pipelined ADC architecture with internal sample-and-hold and low-jitter clock buffer, enabling 71.5 dBFS SINAD at 10 MHz input and 69.7 dBFS at 190 MHz with 3.5 dB coarse gain. Its digital processing block supports independent channel offset correction and programmable filter coefficients via serial interface or parallel pin configuration.

It supports flexible clocking with sine, LVPECL, LVDS, or LVCMOS inputs down to 400 mVPP, includes a clock duty cycle stabilizer, and offers dual output modes: DDR LVDS (3.3 V DRVDD, 100 Ω termination) or multiplexed/parallel CMOS (1.8–3.6 V DRVDD). Internal reference (1 V–2 V) eliminates external reference pins, though external reference mode remains supported.

Key Specifications

Parameter Value and Actual Design Meaning
Resolution 12-bit with no missing codes - guarantees monotonicity and full-scale linearity for precision measurement systems.
Max Sampling Rate 80 MSPS - enables Nyquist-limited bandwidth up to 40 MHz for IF sampling in 802.16d/e and LTE baseband applications.
SINAD @ 10 MHz 71.5 dBFS - provides >11.5 ENOB for high-fidelity digitization of narrowband communication signals.
SFDR @ 190 MHz 87 dBc with 3.5 dB coarse gain - suppresses spurious content critical for radar pulse detection and PA linearization feedback loops.
Analog Power 594 mW at 80 MSPS - balances performance and thermal budget in dense RF front-end PCB layouts.
Crosstalk 95 dB - ensures channel isolation for true dual-channel synchronous sampling in I/Q demodulation paths.
Digital Interface DDR LVDS or parallel CMOS - supports high-speed FPGA interfacing with reduced EMI (LVDS) or legacy logic compatibility (CMOS).

Pinout & Package

ADS62P23IRGCT is housed in a thermally enhanced 64-pin QFN package (9 mm × 9 mm) with exposed thermal pad, θJA = 23.17 °C/W (0 LFM), and JEDEC-standard 4-layer PCB mounting requirements.

Pin/Terminal Circuit Role Design Meaning
INA_P / INA_M Differential analog input, Channel A Accepts 2 VPP differential signal with 450 MHz analog bandwidth; common-mode voltage fixed at 1.5 V in internal reference mode.
INB_P / INB_M Differential analog input, Channel B Independent second channel with identical AC specs and crosstalk isolation of ≥95 dB from Channel A.
CLKP / CLKM Differential clock input Supports LVPECL/LVDS/LVCMOS/sine clocks; accepts 400 mVPP min amplitude; internal duty cycle stabilizer corrects skew.
VCM Common-mode voltage reference Outputs 1.5 V for internal reference mode; accepts 1.45–1.55 V when using external reference.
DA0–DA11 / DB0–DB11 Parallel CMOS data outputs 12-bit wide per channel; configurable as straight binary or 2's complement; multiplexed mode available for single-bus operation.
CLKOUTP / CLKOUTM DDR LVDS output clock Source-synchronous clock for DDR LVDS data capture; zero-cross timing referenced to data valid window per TI SLAS576C Figure 2.
CTRL1 / CTRL2 / CTRL3 Digital control inputs Set power-down, standby, or MUX mode without serial programming; HIGH/HIGH/HIGH enables multiplexed CMOS output.
SEN / SCLK / SDATA Serial interface pins Enable register-level configuration: fine gain, decimation ratio, filter taps, and offset correction; require RESET = LOW to activate.

Key Features

Feature Design Value
Digital processing block On-chip decimation (×2/4/8), 24-tap FIR filtering (low/high/band-pass), and 0.05 dB-step fine gain correction reduce FPGA resource load in SDR and test equipment.
Programmable coarse gain 3.5 dB coarse gain option improves SFDR by ≥2 dB at high input frequencies (e.g., 190 MHz), enabling dynamic range optimization for PA linearization loops.
Flexible clock interface Accepts 400 mVPP sine, LVPECL, LVDS, or LVCMOS clocks - simplifies clock tree design across mixed-signal platforms without level-shifting components.
Internal reference system Integrated 1 V–2 V reference eliminates external reference ICs and associated decoupling, reducing BOM count and layout area in space-constrained RF modules.
Low-latency mode 10-clock-cycle latency (vs. 15 with digital filter enabled) meets real-time closed-loop timing constraints in adaptive beamforming and digital predistortion systems.

Applications

Wireless Infrastructure Baseband Software-Defined Radio (SDR)

Use Scenario: Digitizing dual-channel IF signals from quadrature downconverters in LTE/FDD-TDD macrocell base stations.

IC Role / Device Role / Timing Role: Dual-channel ADC capturing synchronized I/Q streams at 80 MSPS with <100 ps channel-to-channel aperture variation.

Use Value: 95 dB crosstalk and 71.5 dBFS SINAD preserve EVM integrity below 2.5% for 256-QAM modulation under multi-carrier conditions.

Use Scenario: Real-time spectrum analysis and waveform generation in field-deployable cognitive radio platforms.

IC Role / Device Role / Timing Role: High-speed digitizer feeding FPGA-based FFT engines and adaptive filtering pipelines with programmable decimation and FIR coefficients.

Use Value: On-chip 24-tap filter and ×4 decimation reduce FPGA logic utilization by ~35% versus external DSP implementation.

Power Amplifier Linearization Test & Measurement Instrumentation

Use Scenario: Capturing feedback samples from PA output for digital predistortion (DPD) model training in 5G mMIMO transceivers.

IC Role / Device Role / Timing Role: Low-latency ADC (10 cycles) acquiring wideband error signals with 87 dBc SFDR at 190 MHz to resolve intermodulation distortion products.

Use Value: 3.5 dB coarse gain + fine gain tuning enables optimal SNR/SFDR trade-off across varying PA back-off levels without hardware change.

Use Scenario: Embedded digitizer in portable RF vector signal analyzers requiring high dynamic range and dual-channel phase coherence.

IC Role / Device Role / Timing Role: Precision ADC providing calibrated 12-bit data with no missing codes and ±0.6 LSB INL for traceable amplitude accuracy.

Use Value: Internal reference and on-chip offset correction eliminate calibration drift over –40°C to 85°C, reducing factory recalibration frequency.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-channel, 12-bit ADC applications.

Alternative Part Technical Difference Application Difference Selection Advice
ADS62P24IRGCT Higher max sampling rate (105 MSPS); 2.3 mW higher analog power (710 mW); 0.2 dB higher SINAD at 10 MHz (71.3 → 71.5 dBFS). Required for IF sampling above 52.5 MHz (e.g., WCDMA FDD uplink band); not necessary if system clock is ≤80 MSPS. Select ADS62P24IRGCT only when bandwidth headroom beyond 40 MHz is needed; otherwise ADS62P23IRGCT reduces power and cost.
ADS62P22IRGCT Lower max sampling rate (65 MSPS); 80 mW lower analog power (515 mW); identical SINAD (71.5 dBFS) and SFDR (85 dBc @ 190 MHz). Suitable for sub-6 GHz 5G FR1 TDD bands with ≤32.5 MHz instantaneous bandwidth; ideal for battery-powered portable test gear. Choose ADS62P22IRGCT for cost- and power-sensitive designs where 65 MSPS meets Nyquist requirement; retains full feature set including digital processing block.

Compared with ADS62P24IRGCT and ADS62P22IRGCT, the ADS62P23IRGCT delivers optimal balance of 80 MSPS bandwidth, 594 mW power, and 71.5 dBFS SINAD-making it the preferred choice for mid-tier wireless infrastructure and SDR platforms where oversampling margin and thermal density must be tightly managed.

Availability

ADS62P23IRGCT is available at Aetrix Electronics and suitable for wireless communications infrastructure, software-defined radio development, and power amplifier linearization systems requiring stable component supply across industrial temperature ranges and long production lifecycles.

Supply support for ADS62P23IRGCT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and high-performance data converters for industrial, automotive, and communications markets.

The ADS62P2X family was designed specifically for high-speed, dual-channel digitization in wireless infrastructure and instrumentation-emphasizing low power, integrated digital processing, and flexible interface options without sacrificing AC performance.

FAQ

What is the maximum sampling rate supported by the ADS62P23IRGCT?

The ADS62P23IRGCT supports a maximum sampling rate of 80 MSPS, as specified in the SLAS576C datasheet revision October 2011. This rate is validated across the full industrial temperature range (–40°C to 85°C) with AVDD = 3.3 V and proper clock conditioning. Exceeding 80 MSPS may result in degraded SFDR and increased aperture jitter, as confirmed by Table 1 and Electrical Characteristics sections.

Does the ADS62P23IRGCT support both LVDS and CMOS digital outputs?

Yes, the ADS62P23IRGCT supports both DDR LVDS and parallel CMOS outputs. Output mode is selected via the SEN pin voltage level per Table 5: (3/8)AVDD enables straight-binary DDR LVDS, while AVDD selects 2's complement parallel CMOS. The device does not support single-ended CMOS or LVDS-only differential DDR LVDS or 12-bit parallel CMOS with configurable drive strength.

What is the SINAD performance of the ADS62P23IRGCT at 190 MHz input frequency?

At 190 MHz input frequency with 3.5 dB coarse gain enabled, the ADS62P23IRGCT achieves 69.7 dBFS SINAD, as measured under typical conditions (25°C, AVDD = 3.3 V, –1 dBFS input, internal reference). This value is specified across the full temperature range and reflects the device's ability to maintain signal fidelity in high-frequency IF sampling applications such as radar and broadband communications.

Can the ADS62P23IRGCT operate with an external reference voltage?

Yes, the ADS62P23IRGCT supports external reference mode. When the SCLK pin is biased to (3/8)AVDD or (5/8)AVDD, the device disables its internal 1 V–2 V reference and accepts an external reference applied to the VCM pin within 1.45 V to 1.55 V. External reference mode preserves full 12-bit resolution and linearity but requires careful decoupling and noise isolation per Section 8.2.2 of SLAS576C.

What package type and thermal characteristics apply to the ADS62P23IRGCT?

The ADS62P23IRGCT uses a 64-pin QFN package (RGC designation) measuring 9 mm × 9 mm with exposed thermal pad. Its thermal resistance is θJA = 23.17 °C/W (0 LFM air flow) and θJC = 22.1 °C/W when mounted on a JEDEC-standard four-layer 3 in × 3 in PCB with 2 oz. copper and soldered thermal pad, as defined in the Package/Ordering Information section of SLAS576C.

ADS62P23IRGCT Specifications

Product attributes
Attribute value
Manufacturer:
Texas Instruments
Series:
-
Package/Case:
64-VFQFN Exposed Pad
Packaging:
Tape & Reel (TR)
Product Status:
Active
Number of Bits:
12
Sampling Rate (Per Second):
80M
Number of Inputs:
2
Input Type:
Differential
Data Interface:
LVDS - Parallel, Parallel
Configuration:
S/H-ADC
Ratio - S/H:ADC:
1:1
Number of A/D Converters:
2
Architecture:
Pipelined
Reference Type:
External, Internal
Voltage - Supply, Analog:
3V ~ 3.6V
Voltage - Supply, Digital:
1.65V ~ 3.6V
Features:
Simultaneous Sampling
Operating Temperature:
-40°C ~ 85°C
Supplier Device Package:
64-VQFN (9x9)
Mounting Type:
Surface Mount
Grade:
-
Qualification:
-

ADS62P23IRGCT FAQ

1.How can I place an order for ADS62P23IRGCT through Aetrix?

Please submit a Request for Quotation (RFQ) for ADS62P23IRGCT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ADS62P23IRGCT reliable?

The price and inventory of ADS62P23IRGCT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADS62P23IRGCT is usually 5 days.

3.What payment methods are accepted for ADS62P23IRGCT?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADS62P23IRGCT transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ADS62P23IRGCT?

ADS62P23IRGCT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ADS62P23IRGCT order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ADS62P23IRGCT?

For technical support, including ADS62P23IRGCT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADS62P23IRGCT requirements.

6.How does Aetrix verify that ADS62P23IRGCT is sourced from the original manufacturer or authorized distributors?

All ADS62P23IRGCT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADS62P23IRGCT meets industry standards.

7.What is the process for return or replacement of ADS62P23IRGCT?

All ADS62P23IRGCT units undergo pre-shipment inspection (PSI). If there is an issue with ADS62P23IRGCT, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ADS62P23IRGCT part is unused and in its original packaging.

Return procedure for ADS62P23IRGCT:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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