Texas Instruments ADS62P25IRGCT
- Part No.:
- ADS62P25IRGCT
- Manufacturer:
- Texas Instruments
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 64-VFQFN Exposed Pad
- Datasheet:
-
ADS62P25IRGCT.pdf
- Description:
- IC ADC 12BIT PIPELINED 64VQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ADS62P25IRGCT from Texas Instruments is a dual-channel, 12-bit analog-to-digital converter (ADC) with 125 MSPS maximum sampling rate, DDR LVDS and parallel CMOS output interfaces, and integrated digital processing block including decimation (×2/4/8), 24-tap programmable filters, and fine gain correction (0.05 dB steps). It targets high-performance signal acquisition in radar systems and medical imaging equipment where wide analog input bandwidth (450 MHz) and low crosstalk (95 dB) are critical.
For engineers reviewing the ADS62P25IRGCT datasheet, ADS62P25IRGCT pinout, ADS62P25IRGCT application, or ADS62P25IRGCT equivalent, this page delivers verified specifications-including SFDR (84 dBc at 190 MHz, 3.5 dB gain), SINAD (69.5 dBFS), analog power (799 mW), 64-QFN package, and industrial temperature range (–40°C to 85°C)-to support precise signal chain design, layout validation, and drop-in evaluation against performance-critical ADC requirements.
Technical Context
The ADS62P25IRGCT implements a dual-sampling architecture with independent channel A and B paths, each featuring internal sample-and-hold, low-jitter clock buffer, and configurable coarse (0 dB / 3.5 dB) and fine (±6 dB in 0.05 dB steps) gain for SNR/SFDR trade-off optimization. Its digital processing block operates post-conversion and supports real-time offset correction, decimation, and programmable FIR filtering-bypassable by default.
It supports flexible clocking with sine, LVPECL, LVDS, or LVCMOS inputs (400 mVPP minimum amplitude), includes a clock duty cycle stabilizer, and offers dual output modes: DDR LVDS (with 225–350 mV differential swing) or parallel CMOS (1.8 V to 3.6 V DRVDD). Internal reference (1 V–2 V) eliminates external reference pins, though external reference mode remains supported via VCM pin.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Max Sampling Rate | 125 MSPS - enables Nyquist-limited digitization of signals up to 62.5 MHz without aliasing in baseband applications |
| Resolution | 12 bits with no missing codes - guarantees monotonicity and full-scale linearity for precision measurement systems |
| SFDR @ 190 MHz | 84 dBc at 3.5 dB coarse gain - suppresses spurious content critical for wideband RF receiver front-ends |
| SINAD @ 190 MHz | 69.5 dBFS - defines effective dynamic range for high-frequency signal fidelity in SDR and test instrumentation |
| Analog Input BW | 450 MHz - supports direct RF sampling of L-band and lower S-band signals without external pre-filtering |
| Crosstalk | 95 dB - isolates channel A and B paths to prevent inter-channel interference in dual-signal capture scenarios |
| Package | 64-pin QFN (9 mm × 9 mm) - provides thermal performance (θJA = 23.17 °C/W) and board-space efficiency for dense RF layouts |
| Supply Voltages | AVDD = 3.0–3.6 V; DRVDD = 1.8–3.6 V - enables mixed-voltage system integration and LVDS/CMOS interface coexistence |
Pinout & Package
ADS62P25IRGCT uses a thermally enhanced 64-pin QFN package (RGC designation) with exposed thermal pad, 0.5 mm pitch, and JEDEC-standard footprint (9 mm × 9 mm). Pin functions are validated per TI SLAS576C Rev. October 2011.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| INA_P / INA_M | Differential analog input, Channel A | Accepts 2 VPP differential signal with 1.5 V common-mode; supports dc-coupled or ac-coupled configurations |
| INB_P / INB_M | Differential analog input, Channel B | Independent second channel with identical specs; 95 dB crosstalk ensures isolation from Channel A |
| CLKP / CLKM | Differential clock input | Accepts LVPECL/LVDS/LVCMOS/sine clocks; internal duty cycle stabilizer relaxes source jitter and skew constraints |
| VCM | Common-mode reference | Sets 1.5 V input common-mode in internal reference mode; accepts 1.45–1.55 V in external reference configuration |
| DA0–DA11 / DB0–DB11 | Parallel CMOS data outputs | 12-bit wide per channel; configurable for straight binary or 2's complement; multiplexed mode available for space-constrained designs |
| CLKOUTP / CLKOUTM | DDR LVDS output clock | Source-synchronous clock for DDR LVDS data capture; zero-cross timing referenced to data valid window |
| CTRL1–CTRL3 | Digital control inputs | Configure power-down, standby, and output buffer enable/disable states without serial programming |
| SEN / SCLK / SDATA | Serial interface pins | Enable register-level configuration of digital processing block, gain, filter coefficients, and power modes |
Key Features
| Feature | Design Value |
|---|---|
| Dual-channel synchronized sampling | Enables phase-coherent I/Q demodulation and time-aligned dual-sensor acquisition without external synchronization logic |
| Programmable 24-tap FIR filter | Allows on-chip anti-aliasing or channel-equalization filtering, reducing FPGA/DSP preprocessing load and latency |
| Decimation ×2/4/8 | Lowers output data rate while preserving SNR, easing interface bandwidth requirements to downstream processors |
| 3.5 dB coarse + 6 dB fine gain | Optimizes SFDR at reduced input signal levels-critical for low-PAPR waveforms in power amplifier linearization |
| Internal reference with external option | Eliminates reference IC, decoupling caps, and routing; external reference mode supports system-level voltage calibration |
| LVDS/CMOS dual-output interface | Supports migration between low-noise, high-speed LVDS and cost-sensitive CMOS FPGA interfaces without PCB redesign |
Applications
| Radar Systems | Medical Ultrasound Imaging |
|---|---|
Use Scenario: Digitizing IF outputs from quadrature downconverters in pulsed-Doppler radar receivers operating at L-band (1–2 GHz). IC Role / Device Role / Timing Role: Dual-channel ADC capturing synchronized I/Q samples at 125 MSPS with 450 MHz analog bandwidth and 95 dB crosstalk. Use Value: Enables real-time beamforming and clutter rejection without inter-channel phase error or amplitude mismatch. |
Use Scenario: High-frame-rate B-mode ultrasound beamformer front-end acquiring echo returns from 5–10 MHz transducers. IC Role / Device Role / Timing Role: Simultaneous sampling of two receive channels with <80 ps aperture delay variation for sub-millimeter spatial resolution. Use Value: Preserves time-of-flight accuracy across channels, directly improving axial resolution and image contrast. |
| Software Defined Radio (SDR) | Test & Measurement Instrumentation |
Use Scenario: Wideband spectrum analyzer front-end covering 0–60 MHz instantaneous bandwidth in LTE/EUTRA base station monitoring. IC Role / Device Role / Timing Role: 12-bit ADC delivering 84 dBc SFDR at 190 MHz input with programmable decimation and FIR filtering. Use Value: Reduces spurious artifacts during multi-carrier analysis, enabling accurate adjacent channel leakage ratio (ACLR) measurement. |
Use Scenario: High-speed oscilloscope digitizer module requiring low-noise, low-distortion sampling of fast transient signals. IC Role / Device Role / Timing Role: Dual-channel acquisition engine with 69.5 dBFS SINAD and 150 fs RMS aperture jitter at 125 MSPS. Use Value: Maintains vertical accuracy and harmonic integrity for calibrated waveform reconstruction up to 62.5 MHz Nyquist frequency. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel, 12-bit ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS62P24IRGCT | 105 MSPS max sampling rate; 710 mW analog power; 86 dBc SFDR @ 190 MHz (3.5 dB gain) | Better power efficiency at lower throughput; suitable for portable SDR or battery-powered instrumentation | Select when system bandwidth requirement is ≤105 MSPS and thermal budget is constrained |
| ADS62P45IRGCT | 14-bit resolution; 125 MSPS; higher 92 dBc SFDR @ 190 MHz; 1.2 W analog power; pin-compatible 64-QFN | Higher resolution and SFDR for demanding metrology or high-fidelity communications test equipment | Choose for applications needing >12-bit ENOB or improved spurious performance without layout change |
Compared with ADS62P24IRGCT and ADS62P45IRGCT, the ADS62P25IRGCT uniquely balances 125 MSPS throughput, 12-bit precision, and 799 mW power in a single 64-QFN package-making it optimal for fixed-platform radar and medical imaging where full-rate sampling and thermal headroom are prioritized over ultra-low power or extended resolution.
Availability
ADS62P25IRGCT is available at Aetrix Electronics and suitable for radar systems, medical ultrasound imaging, and software-defined radio applications requiring stable component supply, long-term production continuity, and guaranteed industrial temperature grade (–40°C to 85°C) performance.
Supply support for ADS62P25IRGCT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in high-speed data converters and signal chain solutions.
The ADS62P2X family-including ADS62P25IRGCT-is designed for high-performance, dual-channel digitization in demanding RF and instrumentation applications, emphasizing low power, flexible interface options, and integrated digital signal conditioning.
FAQ
What is the maximum sampling rate supported by the ADS62P25IRGCT?
The ADS62P25IRGCT supports a maximum sampling rate of 125 MSPS, as specified in the TI SLAS576C datasheet. This rate is achievable across the full industrial temperature range (–40°C to 85°C) with AVDD = 3.3 V and proper clock signal integrity. At this rate, the device maintains 69.5 dBFS SINAD and 84 dBc SFDR at 190 MHz input with 3.5 dB coarse gain, making ADS62P25IRGCT suitable for wideband signal acquisition in radar and communications infrastructure.
Does the ADS62P25IRGCT include an internal voltage reference?
Yes, the ADS62P25IRGCT integrates an internal reference with VREFT = 2 V and VREFB = 1 V, eliminating the need for external reference components and associated decoupling capacitors. The device also supports external reference mode via the VCM pin (1.45–1.55 V), allowing system-level calibration or tighter voltage tolerance requirements. Both modes are selectable using the SCLK pin voltage level per Table 4 in the ADS62P25IRGCT datasheet.
What output interface options does the ADS62P25IRGCT support?
The ADS62P25IRGCT supports two parallel output interfaces: DDR LVDS and CMOS. DDR LVDS operates with DRVDD = 3.0–3.6 V and delivers 225–350 mV differential swing into 100 Ω loads; CMOS supports DRVDD = 1.8–3.6 V with configurable drive strength. Interface selection is controlled via the SEN pin voltage in parallel mode or through serial register programming, enabling flexible integration with FPGAs, ASICs, or DSPs without hardware changes.
Can the ADS62P25IRGCT perform on-chip digital filtering?
Yes, the ADS62P25IRGCT includes a configurable digital processing block with built-in and custom programmable 24-tap FIR filters supporting low-pass, high-pass, and band-pass responses. Filter coefficients can be loaded via serial interface, and the block also supports offset correction, fine gain adjustment (0.05 dB steps), and decimation by 2, 4, or 8-all applied post-conversion. By default, this block is bypassed, allowing raw data output when maximum throughput is required.
What is the package type and thermal performance of the ADS62P25IRGCT?
The ADS62P25IRGCT is housed in a 64-pin QFN package (RGC designation) measuring 9 mm × 9 mm with an exposed thermal pad. Its thermal characteristics are characterized per JEDEC standards: θJA = 23.17 °C/W (0 LFM airflow) and θJC = 22.1 °C/W when mounted on a 4-layer PCB with 2 oz. copper and soldered thermal pad. This enables reliable operation at full 799 mW analog power dissipation within the –40°C to 85°C industrial temperature range.
ADS62P25IRGCT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 64-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 125M
- Number of Inputs:
- 2
- Input Type:
- Differential
- Data Interface:
- LVDS - Parallel, Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 2
- Architecture:
- Pipelined
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 3V ~ 3.6V
- Voltage - Supply, Digital:
- 1.65V ~ 3.6V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 64-VQFN (9x9)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
ADS62P25IRGCT FAQ
1.How can I place an order for ADS62P25IRGCT through Aetrix?
Please submit a Request for Quotation (RFQ) for ADS62P25IRGCT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADS62P25IRGCT reliable?
The price and inventory of ADS62P25IRGCT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADS62P25IRGCT is usually 5 days.
3.What payment methods are accepted for ADS62P25IRGCT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADS62P25IRGCT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADS62P25IRGCT?
ADS62P25IRGCT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADS62P25IRGCT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADS62P25IRGCT?
For technical support, including ADS62P25IRGCT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADS62P25IRGCT requirements.
6.How does Aetrix verify that ADS62P25IRGCT is sourced from the original manufacturer or authorized distributors?
All ADS62P25IRGCT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADS62P25IRGCT meets industry standards.
7.What is the process for return or replacement of ADS62P25IRGCT?
All ADS62P25IRGCT units undergo pre-shipment inspection (PSI). If there is an issue with ADS62P25IRGCT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADS62P25IRGCT part is unused and in its original packaging.
Return procedure for ADS62P25IRGCT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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