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Texas Instruments ADS6423IRGCT
- Part No.:
- ADS6423IRGCT
- Manufacturer:
- Texas Instruments
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 64-VFQFN Exposed Pad
- Datasheet:
-
ADS6423IRGCT.pdf
- Description:
- IC ADC 12BIT PIPELINED 64VQFN
- Quantity:
- Payment:
- Shipping:
Inventory:2,452
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Product details
Overview
ADS6423IRGCT from Texas Instruments is a quad-channel, 12-bit, 80 MSPS analog-to-digital converter with serial LVDS interface, internal PLL clock multiplication, and programmable coarse/fine gain for SFDR/SNR trade-off - used in base-station IF receivers and medical imaging systems requiring high-density signal acquisition.
For engineers reviewing the ADS6423IRGCT datasheet, ADS6423IRGCT pinout, ADS6423IRGCT application, or ADS6423IRGCT equivalent, this page delivers verified specifications, package mapping, functional alternatives, and design-critical timing and interface details - all confirmed for the exact ADS6423IRGCT variant (QFN-64, industrial temp, 80 MSPS).
Technical Context
The ADS6423IRGCT implements four independent 12-bit ADC cores with simultaneous sample-and-hold, each feeding a digital encoder and serializer. Its internal PLL multiplies the input sampling clock to generate bit clock (DCLK) and frame clock (FCLK) for LVDS serialization.
It supports dual LVDS interface modes: 2-wire DDR (halving data rate to <1 Gbps) and 1-wire SDR, with programmable LVDS current, internal termination, and configurable MSB/LSB-first output format. Gain control includes fixed 3.5 dB coarse gain and up to 6 dB fine gain in 1 dB steps.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit with no missing codes - guarantees monotonicity and full-scale linearity for precision measurement. |
| Sampling Rate | 80 MSPS maximum - enables Nyquist-limited bandwidth up to 40 MHz for IF sampling in wireless infrastructure. |
| SINAD @ 10 MHz | 71.3 dBFS typical - defines effective dynamic range for low-distortion digitization of narrowband signals. |
| SFDR @ 170 MHz | 82 dBc typical with 3.5 dB coarse gain - determines spurious-free performance in wideband receiver front-ends. |
| Power per Channel | 300 mW at 80 MSPS - sets thermal budget for dense multi-ADC PCB layouts in compact systems. |
| LVDS Interface | 2-wire DDR or 1-wire SDR - reduces interconnect count by 50% vs parallel interface, easing FPGA I/O routing. |
| Package | 64-pin QFN (9 mm × 9 mm) with exposed thermal pad - provides low-inductance grounding and 23.17 °C/W θJA. |
Pinout & Package
ADS6423IRGCT is housed in a 64-pin QFN package (RGC designation), 9 mm × 9 mm body with exposed thermal pad, rated for –40°C to +85°C operation. Pin functions are validated per TI SLAS532B Rev. December 2013.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| INA_P / INA_M INB_P / INB_M INC_P / INC_M IND_P / IND_M |
Differential analog inputs (4 channels) | Accepts 2 VPP differential signals; common-mode voltage set to 1.5 V internally or externally via VCM pin. |
| CLKP / CLKM | Differential sampling clock input | Supports sine, LVPECL, LVDS, or LVCMOS clocks down to 400 mVPP; 5–80 MSPS range. |
| DCLKP / DCLKM FCLKP / FCLKM |
LVDS serialized bit clock & frame clock outputs | DDR-aligned LVDS pairs; bit clock derived from PLL; frame clock marks channel boundaries. |
| DA0_P / DA0_M DB0_P / DB0_M DC0_P / DC0_M DD0_P / DD0_M |
LVDS data outputs (2-wire mode, channel A–D) | Each channel serialized over two differential pairs; 12-bit data per sample, LSB/MSB and format configurable. |
| PDN | Global power-down control | Active-high assertion powers down all ADC cores, PLL, and LVDS buffers - reduces consumption to 77 mW. |
| CFG1–CFG4 SEN / SCLK / SDATA |
Parallel/serial configuration interface | Enables pin-strapped or register-based setup of interface mode, gain, reference, and data format without external controller. |
Key Features
| Feature | Design Value |
|---|---|
| Quad-channel 12-bit ADC with simultaneous sampling | Enables coherent multi-antenna IF digitization in diversity receivers without inter-channel skew. |
| Programmable 3.5 dB coarse gain + 6 dB fine gain (1 dB steps) | Improves SFDR by ≥3 dB at high input frequencies while maintaining SNR within 0.5 dB degradation. |
| 2-wire DDR LVDS interface (≤1 Gbps) | Halves data rate vs 1-wire, relaxing FPGA receiver timing closure and reducing PCB layer count. |
| Internal PLL with programmable LVDS output current | Eliminates external clock multiplier; adjustable drive strength widens eye opening for robust capture at 80 MSPS. |
| Internal reference + external reference support | Removes need for external reference IC; external mode allows system-level gain calibration using precision VREF. |
Applications
| Base-Station IF Receivers | Diversity Receivers |
|---|---|
|
Use Scenario: Digitizing 70–230 MHz IF signals from RF front-end mixers in LTE/5G macro base stations. IC Role / Device Role / Timing Role: Quad-channel ADC captures synchronized I/Q streams from multiple antenna paths with <±80 ps channel-to-channel aperture delay variation. Use Value: 82 dBc SFDR at 170 MHz enables detection of weak adjacent-channel signals amid strong interferers. |
Use Scenario: Simultaneous sampling of spatially diverse antenna signals to mitigate multipath fading in MIMO systems. IC Role / Device Role / Timing Role: Four matched ADC channels provide phase-coherent digitization across receive chains for beamforming algorithms. Use Value: 71.3 dBFS SINAD ensures accurate amplitude/phase estimation for real-time adaptive weighting. |
| Medical Ultrasound Imaging | Test Equipment Signal Acquisition |
|
Use Scenario: High-fidelity digitization of echo return signals from phased-array transducers operating at 2–15 MHz center frequencies. IC Role / Device Role / Timing Role: ADC converts analog beamformed RF signals before digital beamforming and envelope detection. Use Value: No missing codes and 12-bit resolution preserve tissue contrast and small lesion detectability in B-mode imaging. |
Use Scenario: Capturing transient waveforms and modulated signals in automated test equipment for RF component validation. IC Role / Device Role / Timing Role: High-speed digitizer front-end supporting flexible trigger, memory depth, and real-time FFT processing. Use Value: 80 MSPS sampling with 500 MHz analog input bandwidth accommodates wideband modulation analysis up to 40 MHz span. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad-channel, 12-bit ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS6422IRGCT | 65 MSPS max sampling rate; 265 mW/channel power; 83 dBc SFDR @ 170 MHz (3.5 dB gain) | Better SFDR at same frequency but lower throughput - suited for cost-sensitive, lower-bandwidth IF stages. | Select when system clock rate ≤65 MSPS and SFDR priority exceeds speed requirement. |
| ADS6424IRGCT | 105 MSPS max sampling rate; 420 mW/channel power; 79 dBc SFDR @ 170 MHz (3.5 dB gain) | Higher speed with slightly lower SFDR - required for wider instantaneous bandwidth or higher IF frequencies. | Select when Nyquist zone extends beyond 40 MHz or multi-carrier LTE-Advanced signal capture is needed. |
Compared with ADS6422IRGCT and ADS6424IRGCT, the ADS6423IRGCT delivers optimal balance of 80 MSPS throughput, 71.3 dBFS SINAD, and 82 dBc SFDR - making it the preferred choice for mid-tier wireless infrastructure and ultrasound systems where both speed and spectral purity are critical.
Availability
ADS6423IRGCT is available at Aetrix Electronics and suitable for base-station IF receivers, medical ultrasound imaging systems, and automated test equipment requiring stable component supply across extended production lifecycles.
Supply support for ADS6423IRGCT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and high-performance data converters for industrial, communications, and medical markets.
The ADS642X family was designed specifically for high-density, multi-channel IF digitization in wireless infrastructure and imaging - emphasizing low inter-channel skew, LVDS interface scalability, and flexible gain programming.
FAQ
What is the maximum sampling rate supported by the ADS6423IRGCT?
The ADS6423IRGCT supports a maximum sampling rate of 80 MSPS across all four channels simultaneously. This is specified under recommended operating conditions with AVDD = LVDD = 3.3 V, 50% clock duty cycle, and –1 dBFS differential analog input. Performance metrics including SINAD and SFDR are characterized at this rate per TI SLAS532B Rev. December 2013.
Does the ADS6423IRGCT require external decoupling capacitors for its internal reference?
No, the ADS6423IRGCT does not require external decoupling capacitors for its internal reference - a key design feature confirmed in the device description and electrical characteristics section of the datasheet. The internal reference (1.0 V bottom / 2.0 V top) is fully self-contained and stable across temperature and supply variations.
What LVDS interface modes does the ADS6423IRGCT support?
The ADS6423IRGCT supports two LVDS interface configurations: 2-wire DDR (dual-data-rate) and 1-wire SDR (single-data-rate), selected via CFG1 pin. The 2-wire DDR mode reduces serialized data rate by half - e.g., 80 MSPS × 12 bits = 960 Mbps raw data becomes 480 Mbps per pair - easing FPGA receiver design and signal integrity.
Can the ADS6423IRGCT operate with an external reference voltage?
Yes, the ADS6423IRGCT supports both internal and external reference modes. When SEN pin is set to (3/8)LVDD or 0 V, the device uses external reference applied to REFP/REFM pins. In external mode, VCM must be biased to 1.45–1.55 V, and full-scale input remains 2 VPP differential - enabling system-level calibration and improved gain accuracy.
What is the channel-to-channel aperture delay variation for the ADS6423IRGCT?
The ADS6423IRGCT specifies a channel-to-channel aperture delay variation of ±80 ps maximum across temperature (–40°C to +85°C), as documented in the timing specifications table. This tight matching ensures phase coherence between channels - essential for beamforming, diversity combining, and time-of-flight measurements in ultrasound and radar systems.
ADS6423IRGCT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 64-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 80M
- Number of Inputs:
- 4
- Input Type:
- Differential
- Data Interface:
- LVDS - Serial
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 4
- Architecture:
- Pipelined
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 3V ~ 3.6V
- Voltage - Supply, Digital:
- 3V ~ 3.6V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 64-VQFN (9x9)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
ADS6423IRGCT FAQ
1.How can I place an order for ADS6423IRGCT through Aetrix?
Please submit a Request for Quotation (RFQ) for ADS6423IRGCT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADS6423IRGCT reliable?
The price and inventory of ADS6423IRGCT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADS6423IRGCT is usually 5 days.
3.What payment methods are accepted for ADS6423IRGCT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADS6423IRGCT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADS6423IRGCT?
ADS6423IRGCT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADS6423IRGCT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADS6423IRGCT?
For technical support, including ADS6423IRGCT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADS6423IRGCT requirements.
6.How does Aetrix verify that ADS6423IRGCT is sourced from the original manufacturer or authorized distributors?
All ADS6423IRGCT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADS6423IRGCT meets industry standards.
7.What is the process for return or replacement of ADS6423IRGCT?
All ADS6423IRGCT units undergo pre-shipment inspection (PSI). If there is an issue with ADS6423IRGCT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADS6423IRGCT part is unused and in its original packaging.
Return procedure for ADS6423IRGCT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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