Texas Instruments ADS7043IRUGR

Overview

ADS7043IRUGR from Texas Instruments is an ultra-low-power, 12-bit, 1-MSPS successive-approximation register (SAR) analog-to-digital converter in an X2QFN-8 package (1.5 mm × 1.5 mm). It features pseudo-differential input (AINP/AINM), AVDD-as-reference architecture, ±1-LSB max INL/DNL, and operates from –40°C to 125°C with AVDD = 1.65–3.6 V. It targets space-constrained, battery-powered sensing in wearable fitness and portable medical equipment.

For engineers reviewing the ADS7043IRUGR datasheet, ADS7043IRUGR pinout, ADS7043IRUGR application, or ADS7043IRUGR equivalent, this page delivers verified electrical specs, SPI interface timing, thermal metrics, real-world use-value tradeoffs for low-power sampling, and validated alternative options for design continuity.

Technical Context

The ADS7043IRUGR implements a capacitor-based SAR ADC with integrated offset calibration, sampling on the CS falling edge and using SCLK for conversion clocking and serial data output. Its pseudo-differential input accepts AINP = 0–AVDD and AINM = AVDD/2 ± 100 mV, enabling unipolar operation referenced to AVDD/2.

It uses AVDD as both analog supply and internal reference voltage, requiring external 1-µF ceramic decoupling. The SPI-compatible serial interface supports up to 16 MHz SCLK, delivers 12-bit straight-binary output in 14-clock cycles (2 leading zeros + 12 data bits), and complies with JESD8-7A for DVDD = 1.65–1.95 V.

Key Specifications

Pinout & Package

X2QFN-8 package (RUG), 1.5 mm × 1.5 mm × 0.35 mm height, wettable flank, leadless, thermally enhanced bottom paddle.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 12-bit SAR ADC applications.

Compared with ADS7043IRUGR, ADS7042IRUGR trades resolution for cost and ADS7138IRTET adds channel count at the expense of size and static power - making ADS7043IRUGR optimal for single-channel, ultra-compact, high-precision battery-powered designs.

Availability

ADS7043IRUGR is available at Aetrix Electronics and suitable for wearable fitness sensors, portable medical devices, ultrasonic flow meters, and motor control current sensing requiring stable component supply across extended product lifecycles.

Supply support for ADS7043IRUGR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company delivering analog and embedded processing solutions with leadership in precision data converters and low-power design.

The ADS7043IRUGR belongs to TI's ultra-low-power SAR ADC product line, engineered specifically for miniaturized, battery-operated sensing systems demanding sub-milliwatt operation and sub-2.5-mm² footprint without sacrificing 12-bit accuracy.

FAQ

What is the reference voltage configuration for the ADS7043IRUGR?

The ADS7043IRUGR uses AVDD as its internal reference voltage - no external reference is required. The full-scale input range is defined as –AVDD/2 to +AVDD/2 for pseudo-differential operation. This architecture simplifies BOM and layout by eliminating dedicated reference ICs or resistive dividers, and TI specifies a 1-µF ceramic capacitor on AVDD for stability. The ADS7043IRUGR's reference accuracy directly tracks AVDD regulation quality.

Does the ADS7043IRUGR support true differential input?

No, the ADS7043IRUGR supports only pseudo-differential input: AINP accepts 0 V to AVDD, while AINM is restricted to AVDD/2 ± 100 mV. It does not accept fully differential signals (e.g., ±VREF). This architecture enables unipolar signal digitization with common-mode rejection but requires external biasing if the source lacks inherent AVDD/2 centering. The ADS7043IRUGR's input structure is optimized for low-power, single-supply sensor interfaces - not instrumentation-grade differential acquisition.

How does the ADS7043IRUGR achieve <1 µW power consumption?

The ADS7043IRUGR achieves sub-microwatt operation at 1 kSPS by dynamically gating internal circuitry - the SAR logic, comparator, and reference buffer are powered down between conversions. At 1 kSPS with AVDD = 3 V, average current drops to <330 nA. This is enabled by its event-driven sampling architecture triggered solely by CS, with no continuous clock or bias current. The ADS7043IRUGR's nanowatt mode is validated across –40°C to 125°C and requires no firmware intervention beyond standard SPI framing.

Can the ADS7043IRUGR interface directly with a 1.8-V microcontroller?

Yes - the ADS7043IRUGR's DVDD pin accepts 1.65–3.6 V, and its digital I/O meets JESD8-7A specifications for 1.65–1.95 V operation. When DVDD = 1.8 V, VIH = 1.17 V (min) and VIL = 0.63 V (max), ensuring reliable logic-level compatibility with standard 1.8-V GPIOs. No level-shifting circuitry is needed. The ADS7043IRUGR maintains full 1-MSPS throughput and specified timing margins at 1.8-V DVDD, as confirmed in TI's SBAS681D datasheet Table 6.5.

What is the purpose of the two leading zero bits in the ADS7043IRUGR's SDO output?

The ADS7043IRUGR outputs a fixed 14-bit frame on SDO: two leading zeros followed by 12 bits of conversion result (MSB first). These zeros serve as synchronization markers - the first zero appears on the CS falling edge, confirming frame start, and the second zero precedes the 12-bit data stream. This structure eliminates ambiguity in bit alignment during high-speed reads and ensures deterministic timing for host controllers parsing the stream. All ADS7043IRUGR variants use this identical framing protocol, regardless of AVDD or throughput setting.