Texas Instruments ADS7280IPW
- Part No.:
- ADS7280IPW
- Manufacturer:
- Texas Instruments
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 16-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
ADS7280IPW.pdf
- Description:
- IC ADC 14BIT SAR 16TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:446
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Product details
Overview
ADS7280IPW from Texas Instruments is a 14-bit, 1-MSPS dual-channel unipolar SAR analog-to-digital converter with integrated 2:1 input MUX, programmable TAG bit output, and SPI/DSP-compatible serial interface. It operates from 2.7V to 5.5V analog supply, delivers ±0.4 LSB typical INL/DNL, and supports auto/manual channel selection in industrial–40°C to +85°C environments - used in precision transducer interface and multi-sensor data acquisition systems.
For engineers reviewing the ADS7280IPW datasheet, ADS7280IPW pinout, ADS7280IPW application, or ADS7280IPW equivalent, key selection considerations include dual-channel sampling timing control, programmable EOC/INT polarity, daisy-chain capability, 105.3 dB SFDR at 10 kHz, and TSSOP-16 package compatibility with board-level signal integrity constraints.
Technical Context
The ADS7280IPW implements a capacitor-based successive approximation register (SAR) architecture with built-in conversion clock (CCLK), enabling precise 14-bit conversions without external timing components. Its dual-input MUX (+IN0/+IN1) and COM terminal support differential or pseudo-differential unipolar acquisition across two channels.
Conversion is initiated by CONVST or auto-triggered via FS/CS; status is reported on EOC/INT/CDI with programmable polarity and duration. The device supports both manual and auto channel select modes, and outputs a 1-bit TAG flag indicating active channel identity during daisy-chain operation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 14-bit - delivers 16,384 discrete output codes for high-fidelity sensor digitization |
| Sampling Rate | 1 MSPS at +VA ≥3.0 V - enables real-time capture of fast transducer signals up to 500 kHz Nyquist bandwidth |
| INL / DNL | ±0.4 LSB typical - ensures monotonicity and <0.0025% full-scale linearity error in closed-loop control feedback paths |
| SFDR | 105.3 dB at fIN = 10 kHz - suppresses spurious content critical for high-dynamic-range magnetometer or medical instrumentation |
| Power Dissipation | 13.7 mW at 1 MSPS, +VA = 3 V, +VBD = 1.8 V - supports battery-powered portable measurement devices |
| Input Range | 0 V to VREF (unipolar) - simplifies front-end design by eliminating level-shifting for grounded-referenced sensors |
| Operating Temp | –40°C to +85°C - qualified for industrial process control and automotive under-hood monitoring applications |
Pinout & Package
TSSOP-16 package with 0.65 mm pitch; exposed thermal pad internally connected to substrate (may be left floating or tied to AGND, but must be isolated from digital ground).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (+VA) | Analog supply input | Accepts 2.7–5.5 V; powers internal SAR core, sample-and-hold, and reference buffer - requires local 100 nF ceramic decoupling |
| 2 (+IN1) | Second analog input | Noninverting input for Channel 1; used with COM to form pseudo-differential pair in dual-channel mode |
| 3 (+IN0) | First analog input | Noninverting input for Channel 0; primary acquisition path when auto channel select is enabled |
| 4 (COM) | Common inverting input | Shared reference node for both channels; typically tied to AGND or sensor common - defines unipolar input range |
| 5 (FS/CS) | Frame sync / chip select | Active-low SPI slave select; also serves as frame sync for TMS320 DSP interface - initiates serial readout sequence |
| 6 (SDI) | Serial data input | Accepts configuration commands (e.g., channel select, EOC polarity); supports software reset and mode programming |
| 7 (SDO) | Serial data output | 3-state output delivering 14-bit conversion result MSB-first; includes optional 1-bit TAG flag in daisy-chain mode |
| 8 (BDGND) | Digital interface ground | Ground reference for +VBD supply and all digital I/O - must be separated from AGND to minimize noise coupling |
| 9 (CONVST) | Conversion start trigger | Edge-sensitive input freezing sample-and-hold and launching conversion; independent of CS for flexible timing control |
| 10 (+VBD) | Buffer I/O supply | 1.65–5.5 V supply for digital interface; sets VIH/VIL thresholds and drives SDO/SCLK - enables mixed-voltage system interfacing |
| 11 (AGND) | Analog ground | Reference for analog circuitry including ADC core, inputs, and REF pins - star-point connection recommended |
| 12 (EOC/INT/CDI) | Status/data input | Programmable open-drain output (EOC or INT) or chain-data input (CDI) in daisy-chain configurations - reduces GPIO count in multi-ADC systems |
| 13 (REF+) | External reference input | High-impedance input accepting 0.3–5.5 V reference voltage; determines full-scale range and directly impacts gain accuracy |
| 14 (REF–) | Reference return | Low-impedance connection point for REF–; must be routed to AGND via dedicated via to minimize noise and offset drift |
| 15 (SCLK) | Serial clock input | Accepts up to 50 MHz clock; synchronizes SDI/SDO transfers and may serve as conversion clock when externally driven |
| 16 (NC) | No connection | Internally unconnected pin - must remain unpopulated and unconnected on PCB to avoid parasitic coupling |
Key Features
| Feature | Design Value |
|---|---|
| Auto/manual channel select mode | Enables seamless switching between two analog inputs without host processor intervention - ideal for multiplexed sensor arrays |
| Programmable TAG bit output | Appends 1-bit channel identifier to each 14-bit conversion result in daisy-chain mode - eliminates external demux logic |
| Built-in conversion clock (CCLK) | 21–24.5 MHz internal oscillator eliminates need for external clock source - reduces BOM count and layout complexity |
| Multi-chip daisy-chain operation | Supports cascaded SDO→SDI connections with single SCLK/FS - scales channel count without increasing SPI bus loading |
| Deep/Nap power-down modes | Reduces current to 1 µA (deep) or 0.5 µA (nap) - extends battery life in intermittent-sampling portable instruments |
Applications
| Transducer Interface | Industrial Process Control |
|---|---|
Use Scenario: Digitizing outputs from strain gauges, RTDs, and pressure sensors in PLC analog input modules. IC Role / Device Role / Timing Role: Dual-channel SAR ADC performing synchronized sampling of sensor pairs with programmable channel sequencing. Use Value: ±0.4 LSB INL ensures <0.006% full-scale measurement accuracy over temperature; 105.3 dB SFDR rejects switch-mode power supply noise in factory-floor environments. | Use Scenario: Monitoring flow, level, and temperature in distributed control systems with remote I/O nodes. IC Role / Device Role / Timing Role: High-speed unipolar ADC acquiring multiple process variables with minimal latency and deterministic timing via CONVST/EOC handshake. Use Value: Auto channel select and TAG bit enable firmware-transparent dual-sensor polling; TSSOP-16 footprint supports compact DIN-rail module designs. |
| Medical Instrumentation | Data Acquisition Systems |
Use Scenario: Signal conditioning in portable ECG and patient vital sign monitors requiring low-power, high-SNR analog front ends. IC Role / Device Role / Timing Role: Precision ADC capturing bio-potential waveforms with 85.9 dB SNR at 10 kHz - preserving diagnostic fidelity. Use Value: 13.7 mW power at 3 V enables >8-hour battery operation; deep power-down mode cuts quiescent current to 1 µA during standby intervals. | Use Scenario: Modular DAQ cards for test benches measuring vibration, acoustic emission, and thermal transients. IC Role / Device Role / Timing Role: 1-MSPS dual-input converter supporting simultaneous sampling of complementary sensor signals (e.g., acceleration + temperature). Use Value: Daisy-chain capability allows stacking up to 8 ADS7280IPW units on one SPI bus - simplifying multi-channel synchronization and reducing FPGA resource usage. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel, 14-bit SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS7279IPW | Single-channel variant; identical pinout, timing, and electrical specs except missing +IN1/COM and auto channel select logic | Used where only one analog input is required per node - lower channel density but same PCB layout | Select when system requires only single-ended acquisition and cost reduction per node is prioritized over channel flexibility |
| ADS8329IPW | 16-bit resolution, 500 kSPS, no built-in MUX or TAG bit; higher SNR (92 dB) but slower throughput and larger code size overhead | Suitable for ultra-high-precision DC measurements (e.g., calibration equipment), not real-time dynamic signal capture | Choose when absolute accuracy >16-bit and 500 kSPS suffices - avoid if dual-channel or 1-MSPS timing is mandatory |
Compared with ADS7279IPW, the ADS7280IPW adds dual-channel acquisition and TAG bit output without changing footprint or interface; versus ADS8329IPW, it trades 2-bit resolution for 2× speed, integrated MUX, and lower power - making it optimal for time-critical, multi-sensor embedded systems.
Availability
ADS7280IPW is available at Aetrix Electronics and suitable for industrial process control, medical instrumentation, and transducer interface applications requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for ADS7280IPW includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies for industrial, automotive, and communications markets.
The ADS7280IPW belongs to TI's low-power, high-speed SAR converter family designed specifically for precision data acquisition in space- and power-constrained embedded systems operating across –40°C to +85°C.
FAQ
What is the maximum sampling rate supported by the ADS7280IPW?
The ADS7280IPW supports a maximum sampling rate of 1 MSPS when the analog supply voltage (+VA) is between 3.0 V and 5.5 V. At +VA = 2.7 V to <3.0 V, the maximum rate drops to 900 kSPS. This rate is sustained using the internal conversion clock (CCLK), and timing compliance must be verified against the 21–24.5 MHz CCLK specification in the datasheet. The ADS7280IPW maintains full 14-bit performance across this range.
How does the programmable TAG bit function in daisy-chain mode for the ADS7280IPW?
In daisy-chain mode, the ADS7280IPW appends a 1-bit TAG flag to its 14-bit conversion result on the SDO line - '0' indicates Channel 0 (+IN0), '1' indicates Channel 1 (+IN1). This occurs automatically when auto channel select is enabled and multiple ADS7280IPW devices are cascaded (SDO→SDI). The host reads 15 bits per device, eliminating need for external channel ID tracking logic. The ADS7280IPW datasheet confirms TAG bit behavior is exclusive to the ADS7280 family and not present in ADS7279.
Can the ADS7280IPW operate with separate analog and digital supply voltages?
Yes, the ADS7280IPW supports independent analog (+VA = 2.7–5.5 V) and digital interface (+VBD = 1.65–5.5 V) supplies. This allows interfacing with 1.8 V, 3.3 V, or 5 V controllers while maintaining full analog performance. BDGND and AGND must be kept separate except at a single star point, and +VBD sets VIH/VIL thresholds - confirmed in Electrical Characteristics tables for both 5 V and 1.8 V conditions. The ADS7280IPW tolerates up to ±0.3 V ground offset between AGND and BDGND.
What are the power-down modes available on the ADS7280IPW and their typical current draw?
The ADS7280IPW offers three power-down modes: Deep Power-Down (1 µA typical), Nap Power-Down (0.5 µA typical), and Auto Nap (0.3 µA typical). These are entered via SPI command and retain register state. Deep mode disables all circuitry except wake-up logic; Nap retains reference and bias circuits for faster wake-up (<1 µs). All modes are specified over –40°C to +85°C and validated in the Power-Supply Requirements section of the ADS7280IPW datasheet.
Is the ADS7280IPW pin-compatible with other devices in the ADS72xx family?
The ADS7280IPW shares identical TSSOP-16 pinout and electrical timing with ADS7279IPW, allowing drop-in replacement where dual-channel functionality is not required. However, ADS7280IPW uses pins 2 (+IN1) and 4 (COM) for second-channel input, while ADS7279IPW assigns those as RESERVED and –IN respectively. Thus, ADS7280IPW is not backward-pin-compatible with ADS7279IPW in existing layouts unless +IN1/COM are unused - confirmed in Terminal Functions tables for both devices.
ADS7280IPW Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 14
- Sampling Rate (Per Second):
- 1M
- Number of Inputs:
- 2
- Input Type:
- Pseudo-Differential, Single Ended
- Data Interface:
- SPI, DSP
- Configuration:
- MUX-S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 1.65V ~ 5.5V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 16-TSSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
ADS7280IPW FAQ
1.How can I place an order for ADS7280IPW through Aetrix?
Please submit a Request for Quotation (RFQ) for ADS7280IPW on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADS7280IPW reliable?
The price and inventory of ADS7280IPW are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADS7280IPW is usually 5 days.
3.What payment methods are accepted for ADS7280IPW?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADS7280IPW transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADS7280IPW?
ADS7280IPW orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADS7280IPW order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADS7280IPW?
For technical support, including ADS7280IPW datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADS7280IPW requirements.
6.How does Aetrix verify that ADS7280IPW is sourced from the original manufacturer or authorized distributors?
All ADS7280IPW products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADS7280IPW meets industry standards.
7.What is the process for return or replacement of ADS7280IPW?
All ADS7280IPW units undergo pre-shipment inspection (PSI). If there is an issue with ADS7280IPW, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADS7280IPW part is unused and in its original packaging.
Return procedure for ADS7280IPW:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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