Texas Instruments ADS7804U

Overview

ADS7804U from Texas Instruments is a 12-bit successive approximation register (SAR) analog-to-digital converter with integrated sample-and-hold, internal 2.5V reference, full parallel output, and ±10V input range. It operates from a single +5V supply, achieves 100kHz sampling rate, and delivers 72dB SINAD at 45kHz input - designed for precision industrial data acquisition systems requiring high linearity and low power.

For engineers reviewing the ADS7804U datasheet, ADS7804U pinout, ADS7804U application, or ADS7804U equivalent, this page provides verified technical context, real-world design meaning of key specs, validated SOIC-28 package mapping, confirmed pin functions, and two rigorously cross-checked alternative parts for ±10V, 100kHz, 12-bit SAR ADC applications.

Technical Context

The ADS7804U implements a capacitor-based SAR architecture with on-chip S/H, clock generator, and three-state parallel bus drivers. Its control logic uses CS and R/C inputs to initiate conversion and enable output, with BUSY signaling completion. Internal laser-trimmed resistors ensure ±10V input scaling without external gain-setting components.

It supports both internal (2.5V ±20mV) and external (2.3V–2.7V) references, with CAP pin providing buffered reference output requiring a 2.2µF tantalum capacitor. The device guarantees no missing codes over temperature and maintains ±0.45 LSB INL in the UB variant - the ADS7804U variant specifies ±0.9 LSB INL per its ordering table.

Key Specifications

Pinout & Package

ADS7804U is housed in a 28-pin SOIC (DW) package with 0.3-inch body width, gull-wing leads, and JEDEC MS-013 compliance. Pin spacing is 0.050 inch (1.27 mm), and thermal resistance θ_JA is 75°C/W.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 12-bit SAR ADC applications.

Compared with ADS7805U and MAX195BCNG+, the ADS7804U uniquely combines native ±10V input compatibility, internal reference, and 12-bit performance in a drop-in SOIC-28 footprint - reducing design risk and layout complexity for industrial DAQ upgrades.

Availability

ADS7804U is available at Aetrix Electronics and suitable for industrial data acquisition, motor control feedback, and test equipment requiring stable component supply across long production lifecycles.

Supply support for ADS7804U includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in precision data converters and industrial-grade ICs.

The ADS7804U belongs to TI's precision SAR ADC product line, engineered for high-accuracy, low-power, single-supply operation in harsh industrial environments - targeting applications where ±10V signal integrity and long-term calibration stability are critical.

FAQ

What is the guaranteed INL specification for ADS7804U across temperature?

The ADS7804U guarantees ±0.9 LSB integral nonlinearity over the full industrial temperature range of –40°C to +85°C, as specified in the Electrical Characteristics table for ADS7804P/U variants. This corresponds to ±4.4mV error at ±10V full scale and ensures monotonic behavior without missing codes. The ADS7804UB variant improves this to ±0.45 LSB, but ADS7804U maintains the ±0.9 LSB spec for cost-optimized deployments.

Can ADS7804U operate with an external reference, and what voltage range is supported?

Yes, ADS7804U supports external reference operation via the REF pin (pin 3). The valid external reference voltage range is 2.3V to 2.7V, and it must be applied with appropriate decoupling (2.2µF tantalum to AGND2). Using an external reference replaces the internal 2.5V source and directly scales the full-scale range - for example, a 2.7V reference yields ±10.8V input range and 5.27mV LSB. ADS7804U retains all AC specifications (e.g., 70dB SINAD) when using an external reference meeting these conditions.

Is ADS7804U pin-compatible with ADS7805U, and what design changes are needed for substitution?

Yes, ADS7804U is pin-compatible with ADS7805U in the SOIC-28 (DW) package - all 28 pins share identical functions and physical locations. However, ADS7805U is a 16-bit device with tighter INL (±0.5 LSB) and higher power (120mW). Substitution requires verifying that firmware handles 16-bit words, that timing margins accommodate longer conversion time (12µs vs. 10µs), and that reference stability meets higher-resolution demands. ADS7804U remains optimal when 12-bit resolution suffices and power budget is constrained.

What is the maximum recommended capacitive load on the CAP pin of ADS7804U?

The CAP pin (pin 4) of ADS7804U must be decoupled with a minimum 2.2µF tantalum capacitor to AGND2, placed as close as possible to the pin. Capacitance values smaller than 1µF risk internal reference buffer oscillation and insufficient charge delivery to the CDAC, degrading linearity and causing conversion errors. Larger values (>2.2µF) provide negligible benefit. The CAP pin is not intended to drive external loads - DC loads exceeding 2mA or any AC load will degrade ADS7804U performance and are strictly prohibited per the datasheet.

How does the BUSY signal function during ADS7804U conversion, and how should it be used for data latching?

The BUSY signal (pin 26) is an active-low open-drain output that goes LOW at conversion start and returns HIGH only after the conversion completes and the output registers are fully updated. Engineers should use the rising edge of BUSY as a hardware latch strobe - connecting it to a flip-flop clock or microcontroller interrupt - to capture valid D11–D0 data. Reading data before BUSY goes HIGH risks capturing incomplete or stale values from prior conversions, as confirmed by timing parameter t5 (BUSY delay after end of conversion = 220ns max) and Table IV.