Texas Instruments ADS7946SRTET

Overview

ADS7946SRTET from Texas Instruments is a 14-bit, 2 MSPS single-ended dual-channel SAR analog-to-digital converter with integrated input multiplexer and sample-and-hold. It operates from 2.7 V to 5.25 V AVDD and 1.65 V to AVDD DVDD, delivers 82 dB SNR at 20 kHz, and supports SPI interface with 16-clock frame timing. It is used in high-precision, low-power data acquisition systems requiring channel switching and wide supply flexibility.

For engineers reviewing the ADS7946SRTET datasheet, ADS7946SRTET pinout, ADS7946SRTET application, or ADS7946SRTET equivalent, key selection considerations include its single-ended input architecture (AIN0/AIN1 with dedicated AINxGND pins), 1.5 µA static AVDD current in power-down mode, guaranteed no missing codes over –40°C to +125°C, and QFN-16 (3 mm × 3 mm) package compatibility with ADS7945/ADS7947–ADS7949 family footprints.

Technical Context

The ADS7946SRTET implements a successive approximation register (SAR) ADC core with an inherent sample-and-hold stage and a two-channel single-ended analog input multiplexer controlled by the CH SEL pin. Conversion is initiated by CS falling edge and completed in exactly 16 SCLK cycles, enabling deterministic timing for real-time control loops.

It uses a CMOS-compatible SPI interface with SDO output only (no SDI), supports external reference voltages from 2.5 V to AVDD, and features automatic power-down activation via PDEN high at CS rising edge - reducing AVDD current to 2.5 µA while maintaining fast 1 µs wake-up time.

Key Specifications

Pinout & Package

The ADS7946SRTET is housed in a 3 mm × 3 mm, 16-pin QFN package (RTE) with exposed thermal pad. Pin 1 is located at the top-left corner (marked dot), and the package is lead-free and RoHS-compliant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-channel SAR ADC applications.

Compared with ADS7945SRTET, the ADS7946SRTET trades differential noise immunity for simplified single-ended sensor interfacing and lower BOM count; compared with ADS7947SRTET, it delivers 2 additional bits of resolution at modest power penalty - ideal when 14-bit fidelity is required without redesigning the analog front-end.

Availability

ADS7946SRTET is available at Aetrix Electronics and suitable for motor control systems, portable medical devices, industrial data loggers, and optical transceiver modules requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for ADS7946SRTET includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, delivering analog and embedded processing solutions for industrial, automotive, and communications markets.

The ADS79xx family was designed to provide high-speed, low-power, multi-channel SAR ADCs with flexible input configurations and robust operation across –40°C to +125°C - targeting space-constrained, battery-aware, and high-reliability data acquisition systems.

FAQ

What is the maximum recommended SCLK frequency for reliable operation of the ADS7946SRTET?

The ADS7946SRTET supports a maximum SCLK frequency of 40 MHz, which corresponds to its 2 MSPS sample rate using a 16-clock frame. At this rate, timing parameters including tWL (8 ns min), tWH (8 ns min), and tD2 (7.1 ns max at DVDD = 5 V) must be strictly observed. Exceeding 40 MHz violates setup/hold margins and risks data corruption on the SDO line. The ADS7946SRTET datasheet specifies all timing limits under worst-case conditions across temperature and voltage.

Does the ADS7946SRTET require an external reference, or can it operate with an internal one?

The ADS7946SRTET does not include an internal reference and requires an external voltage applied to the REF pin, ranging from 2.5 V to AVDD. The REFGND pin must be shorted to the analog ground plane and decoupled locally. Using an external precision reference (e.g., REF5025) ensures full 14-bit performance; relying on AVDD as reference degrades SNR and INL due to supply noise and drift. The ADS7946SRTET specification assumes external reference compliance.

How does the CH SEL pin affect channel selection timing relative to the CS signal?

The CH SEL pin must be stable at least half an SCLK cycle after the CS falling edge to ensure proper multiplexer settling before sampling begins. If CH SEL changes during the acquisition window (tACQ = 80 ns), the ADC may sample from an undefined channel or exhibit increased glitch energy. The ADS7946SRTET datasheet explicitly defines this timing constraint in Figure 84 and Table 1, and violation risks incorrect channel assignment in high-throughput applications.

What is the purpose of the AIN0GND and AIN1GND pins on the ADS7946SRTET?

The AIN0GND and AIN1GND pins provide dedicated ground-sense connections for each analog input channel, enabling true single-ended measurements referenced to local sensor ground rather than system GND. This architecture rejects ground-loop noise and offsets between remote sensors - critical in distributed industrial sensing. Unlike pseudo-differential schemes, the ADS7946SRTET uses these pins to establish independent common-mode baselines per channel, as confirmed in the "ELECTRICAL CHARACTERISTICS: ADS7946" section.

Can the ADS7946SRTET be powered down between conversions to reduce average power consumption?

Yes, the ADS7946SRTET supports hardware-controlled power-down via the PDEN pin. When PDEN is high at the rising edge of CS, the device enters power-down mode after conversion completion, reducing AVDD supply current to 2.5 µA. Wake-up occurs in 1 µs upon next CS falling edge. This feature is validated across –40°C to +125°C and enables ultra-low average power in burst-mode acquisition - a capability explicitly documented in the "Low Power" feature list and Electrical Characteristics tables.