Texas Instruments ADS7947SRTET

Overview

ADS7947SRTET from Texas Instruments is a 12-bit, 2.1-MSPS pseudo-differential successive approximation register (SAR) analog-to-digital converter with integrated 2-channel analog multiplexer. It operates from 2.7 V to 5.5 V analog supply and 1.65 V to AVDD digital supply, delivers 72 dB SNR and ±0.3 LSB INL (max), and targets high-precision, low-power data acquisition in space-constrained industrial and medical systems.

For engineers reviewing the ADS7947SRTET datasheet, ADS7947SRTET pinout, ADS7947SRTET application, or ADS7947SRTET equivalent, this page provides verified technical context, real-world design meaning of key specs, validated pin functions, confirmed alternatives for resolution- or speed-sensitive designs, and supply-chain support for volume deployment.

Technical Context

The ADS7947SRTET implements a true SAR architecture with internal sample-and-hold, supporting unipolar pseudo-differential input pairs (AIN0P/AIN0N, AIN1P/AIN1N) and channel selection via CH SEL. Its 16-clock SPI frame enables 2 MSPS operation, while short-frame mode achieves 2.1 MSPS without performance loss.

It features auto power-down triggered by PDEN high at CS rising edge, reducing AVDD current to 2.5 µA in static state. The device maintains dc precision (±0.3 LSB INL, no missing codes) and dynamic fidelity (72 dB SNR, 86 dB SFDR) across –40°C to +125°C using a single external reference applied to REF/REFGND.

Key Specifications

Pinout & Package

ADS7947SRTET is housed in a 3.00 mm × 3.00 mm, 16-pin WQFN package (RTE suffix) with wettable flanks for automated optical inspection.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar SAR ADC applications.

Compared with ADS7947SRTET, ADS7948SRTET trades resolution for speed and lower cost in multi-channel monitoring, while ADS8860IDRCT delivers superior dc precision at reduced throughput and without channel multiplexing-making each suitable for distinct system-level trade-offs.

Availability

ADS7947SRTET is available at Aetrix Electronics and suitable for medical instrumentation, optical networking monitoring, and industrial motor control applications requiring stable component supply, extended temperature qualification, and long-term production continuity.

Supply support for ADS7947SRTET includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in precision data converters and industrial-grade signal chain solutions.

The ADS794x family was designed for ultra-low-power, high-throughput data acquisition in space- and energy-constrained systems-emphasizing integration (dual-channel mux), wide supply flexibility, and extended temperature reliability.

FAQ

What is the maximum sample rate of the ADS7947SRTET and under what conditions?

The ADS7947SRTET achieves a maximum sample rate of 2.1 MSPS when operated with a 34-MHz SCLK and a short data frame optimized for its 12-bit resolution. This mode requires CS to remain low for exactly 13.5 SCLK cycles per conversion. At standard 16-clock framing, the rate is 2 MSPS. Both modes maintain full dc and ac specifications including ±0.3 LSB INL and 72 dB SNR.

Does the ADS7947SRTET require an external reference, and what voltage range is supported?

Yes, the ADS7947SRTET requires an external reference applied between REF and REFGND pins. It supports reference voltages from 2.5 V up to AVDD, with AVDD ranging from 2.7 V to 5.5 V. A stable, low-noise reference (e.g., REF5025 or REF6025) is recommended to preserve the specified 72 dB SNR and ±0.3 LSB INL performance across temperature.

How does the channel selection work on the ADS7947SRTET, and what timing constraints apply?

Channel selection on the ADS7947SRTET is controlled by the CH SEL pin: logic low selects AIN0P/AIN0N, logic high selects AIN1P/AIN1N. TI specifies that CH SEL must be stable within one SCLK period after the CS falling edge to ensure proper multiplexer settling before sampling begins. Violating this window may cause inter-channel crosstalk or gain error.

What power-saving modes does the ADS7947SRTET support, and how much current does it draw in each?

The ADS7947SRTET supports automatic power-down activated by asserting PDEN high at the CS rising edge. In dynamic power-down (SCLK active), AVDD current drops to 550 µA; in static power-down (SCLK stopped), it falls to 2.5 µA. Full wake-up takes ≤1 µs. At 2 MSPS, total supply current is ~2.5 mA (AVDD) + 500 µA (DVDD) = ~3 mA, consuming 7.5 mW at 3.3 V.

Is the ADS7947SRTET pin-compatible with other devices in the ADS794x family, and what are the implications?

Yes, the ADS7947SRTET is fully pin-compatible with ADS7948SRTET (10-bit) and ADS7949SRTET (8-bit) in the same WQFN-16 package. This allows hardware reuse across resolution tiers-e.g., upgrading from 10-bit to 12-bit without PCB changes. However, firmware must accommodate differing data widths (12 vs. 10 vs. 8 bits) and timing (13.5 vs. 10.5 vs. 8.5 SCLK cycles per conversion).