Texas Instruments ADS7949SRTER

Overview

ADS7949SRTER from Texas Instruments is an 8-bit, dual-channel, pseudo-differential successive approximation register (SAR) analog-to-digital converter with 3 MSPS throughput, 72 dB SNR (min), ±0.3 LSB INL (max), and SPI-compatible serial interface. It operates from 2.7 V to 5.5 V AVDD and 1.65 V to AVDD DVDD, and is used in battery-powered data acquisition systems requiring low power and compact size.

For engineers reviewing the ADS7949SRTER datasheet, ADS7949SRTER pinout, ADS7949SRTER application, or ADS7949SRTER equivalent, key selection criteria include its 3-MSPS sample rate at 8-bit resolution, ultra-low 0.16 mW power consumption at 20 kSPS, pseudo-differential input architecture with channel select control, and operation across –40°C to +125°C.

Technical Context

The ADS7949SRTER integrates a 2-channel analog multiplexer feeding a low-power SAR ADC core, supporting unipolar pseudo-differential inputs where AIN0N and AIN1N are referenced to ground or biased within ±0.2 V. Its conversion timing uses an 8.5-SCLK frame for full 3-MSPS operation, with aperture jitter of 10 ps and acquisition time of 80 ns.

It implements automatic power-down triggered by PDEN high at CS rising edge, reducing AVDD current to 2.5 µA static, and supports flexible reference configuration via external REF/REFGND pins. The SPI interface operates up to 40 MHz SCLK with CMOS-level logic and supports standard 16-clock frames or optimized short frames.

Key Specifications

Pinout & Package

The ADS7949SRTER is housed in a 3-mm × 3-mm, 16-pin WQFN package with exposed thermal pad (RTE suffix), optimized for thermal performance and PCB area efficiency in space-constrained systems.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar SAR ADC applications.

Compared with ADS7948SRTER and ADS8860IDRCT, the ADS7949SRTER trades resolution and SNR for higher throughput and lower power at 8-bit depth-making it optimal for cost-sensitive, battery-operated systems needing fast dual-channel sampling without overspecification.

Availability

ADS7949SRTER is available at Aetrix Electronics and suitable for portable medical sensors, industrial motor current monitoring, optical transceiver monitoring, and wireless base station RF front-end calibration requiring stable component supply and extended temperature support.

Supply support for ADS7949SRTER includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company delivering analog and embedded processing solutions for industrial, automotive, and communications markets.

The ADS794x family was designed for ultra-low-power, high-throughput data acquisition in space- and energy-constrained systems-emphasizing pin-compatible scalability across 8-/10-/12-bit variants and robust operation from –40°C to +125°C.

FAQ

What is the maximum sample rate of the ADS7949SRTER and under what conditions is it achieved?

The ADS7949SRTER achieves a maximum sample rate of 3 MSPS when operated with a 34-MHz SCLK and a short 8.5-clock data frame. This requires CS to remain low for exactly 8.5 SCLK cycles per conversion. At standard 16-clock framing, the throughput drops to 2 MSPS. The 3-MSPS mode maintains full AC and DC specifications including SNR ≥72 dB and INL ≤±0.3 LSB, as verified across –40°C to +125°C.

Does the ADS7949SRTER support true differential input, or is it pseudo-differential only?

The ADS7949SRTER supports pseudo-differential input only: each channel uses one dedicated positive input (AIN0P or AIN1P) and one shared negative input (AIN0N or AIN1N) that must remain within ±0.2 V of ground and may be tied directly to GND. It does not support true differential signaling (e.g., AIN0P–AIN0N differential pair with full swing). This architecture simplifies sensor interfacing while providing common-mode noise rejection on the negative input.

How does the power-down feature of the ADS7949SRTER operate, and what is the wake-up time?

The ADS7949SRTER enters power-down mode when PDEN is high at the rising edge of CS. In this state, AVDD current drops to 2.5 µA (static) or 550 µA (dynamic with SCLK active). Wake-up occurs on the next CS falling edge, with guaranteed power-up time of ≤1 µs-enabling rapid reactivation between bursts of sampling without external reset. No additional command or delay is required beyond the standard SPI transaction sequence.

Can the ADS7949SRTER interface directly with a 1.8-V microcontroller SPI port without level shifting?

Yes-the ADS7949SRTER supports DVDD as low as 1.65 V, and its SPI input thresholds are defined as VIH = 0.7×DVDD and VIL = 0.3×DVDD. With DVDD = 1.8 V, VIH = 1.26 V and VIL = 0.54 V, which are compatible with standard 1.8-V CMOS logic levels. The SDO output also swings rail-to-rail (VOH ≥ DVDD – 0.2 V, VOL ≤ 0.4 V), ensuring reliable communication with 1.8-V hosts without external level shifters.

What is the purpose of the NC pins (9 and 10) on the ADS7949SRTER WQFN package?

Pins 9 and 10 of the ADS7949SRTER are no-connect (NC) terminals-internally unconnected and electrically inactive. Texas Instruments recommends externally shorting both to GND to improve mechanical stability during reflow, reduce parasitic capacitance, and enhance EMI immunity. Leaving them floating is not advised, as it may increase susceptibility to noise coupling or solder voiding in the thermal pad area.