Texas Instruments ADS807E/1K
- Part No.:
- ADS807E/1K
- Manufacturer:
- Texas Instruments
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 28-SSOP (0.209", 5.30mm Width)
- Datasheet:
-
ADS807E/1K.pdf
- Description:
- IC ADC 12BIT PIPELINED 28SSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,020
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Product details
Overview
ADS807E/1K from Texas Instruments is a 12-bit, 53-MHz pipelined analog-to-digital converter (ADC) with differential track-and-hold, internal/external reference selection, and 3-state digital outputs. It delivers 82 dB spurious-free dynamic range at 10 MHz input and 69 dB SNR at 3 Vp-p full-scale, targeting high-fidelity IF sampling in communications base stations and medical imaging systems.
For engineers reviewing the ADS807E/1K datasheet, ADS807E/1K pinout, ADS807E/1K application, or ADS807E/1K equivalent, this page provides verified technical context, SSOP-28 package mapping, real-world interface constraints (e.g., 6-cycle latency, ±0.5 LSB DNL), and two validated alternative ADCs for undersampling and imaging use cases.
Technical Context
The ADS807E/1K employs a 12-stage pipelined CMOS architecture with on-chip digital error correction logic to guarantee no missing codes and ±0.5 LSB typical DNL across temperature. Its differential track-and-hold supports both differential and single-ended analog inputs, with common-mode voltage output (CM pin) enabling self-biased driver configurations.
Timing is governed by a rising-edge–triggered convert clock with 6-clock-cycle data latency and 2 ns aperture delay. The device integrates internal reference buffers (REFT/REFB), FSSEL-controlled full-scale range selection (2 Vp-p or 3 Vp-p), over-range flag (OTR), and output enable (OE) for board-level multiplexing-enabling direct integration into multichannel acquisition systems without external support circuitry.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit tested - guarantees monotonicity and no missing codes at full speed. |
| Max Sampling Rate | 53 MSPS - enables Nyquist sampling of IF signals up to 26.5 MHz or undersampling of higher RF bands. |
| SFDR @ 10 MHz fIN | 82 dBFS - determines usable dynamic range in multi-tone communication signals before spurious artifacts dominate. |
| SNR @ 10 MHz, 3 Vp-p | 69 dB - sets theoretical ENOB ≈ 11.2 bits for high-fidelity digitization of low-noise analog waveforms. |
| DNL | ±0.5 LSB typical - ensures linearity critical for medical imaging histogram accuracy and spectral purity in test equipment. |
| Power Dissipation | 335 mW (internal ref, VDRV = 5 V) - defines thermal budget for dense PCB layouts in compact base station modules. |
| Input Range Flexibility | 2 Vp-p or 3 Vp-p differential - allows optimization between noise floor (2 V) and headroom (3 V) without changing external components. |
Pinout & Package
ADS807E/1K is housed in a 28-pin SSOP (Shrink Small Outline Package) with 0.65 mm pitch, JEDEC MO-153 compliant, θJA = 50°C/W. Pin 1 is located at the top-left corner when viewed from the top with the index mark oriented left.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 20, 26 | GND | Three independent ground connections - separate analog/digital return paths reduce coupling noise in mixed-signal layout. |
| 2–13 | Bit 1 (MSB) to Bit 12 (LSB) | CMOS 3-state parallel output bus - OE pin controls tristate; timing referenced to CLK rising edge with 6-cycle latency. |
| 14 | CLK | Convert clock input - rising-edge triggered; minimum period 18.87 ns (53 MHz); requires clean, low-jitter source for SFDR preservation. |
| 15, 27 | +VS | +5 V analog/digital supply - must be decoupled locally; absolute max +6 V; supplies internal reference and core logic. |
| 16 | FSSEL | Full-scale select - LOW = 2 Vp-p, HIGH/FLOATING = 3 Vp-p; internal 50 kΩ pull-down enables default 2 V mode. |
| 17 | OTR | Over-range indicator - active-high open-drain flag signaling input exceeding selected full-scale range; used for AGC feedback. |
| 18 | INT/EXT | Reference select - LOW = internal reference enabled; HIGH/FLOATING = external reference mode; disables internal buffers. |
| 19 | OE | Output enable - active-low; internal 50 kΩ pull-down allows default high-Z state; critical for shared data bus architectures. |
| 21–22 | REFB / REFT | Reference bottom/top pins - provide buffered 2.0 V / 3.0 V (2 V mode) or 1.75 V / 3.25 V (3 V mode); can source/sink ≤1 mA. |
| 23 | CM | Common-mode voltage output - supplies mid-rail bias (≈+2.5 V) for driver amplifiers; eliminates need for external level-shifting. |
| 24–25 | IN / IN | Differential analog inputs - capacitive input structure (1.25 MΩ || 3 pF); require R-C network (e.g., 24.9 Ω + 68 pF) for optimal SFDR. |
| 28 | VDRV | Logic driver supply - sets output voltage levels (3 V or 5 V); independent of +VS; enables mixed-voltage system interfacing. |
Key Features
| Feature | Design Value |
|---|---|
| Digital error correction | Guarantees ±0.5 LSB DNL and no missing codes at 53 MSPS - essential for histogram integrity in CCD digitizing and ultrasound imaging. |
| Differential track-and-hold | Rejects even-order harmonics and common-mode noise - improves SFDR by ≥10 dB vs. single-ended operation at 10–20 MHz. |
| Flexible reference architecture | Internal bandgap reference with FSSEL-selectable 2 Vp-p/3 Vp-p ranges - eliminates external resistors while supporting multichannel tracking. |
| Over-range indicator (OTR) | Real-time saturation detection - enables closed-loop gain control in front-end amplifiers without added ADC or comparator circuitry. |
| Common-mode output (CM) | Stable +2.5 V bias source - simplifies single-supply driver design (e.g., OPA2681) and removes need for precision external voltage dividers. |
Applications
| Communications IF Processing | Medical Imaging |
|---|---|
|
Use Scenario: Digitizing 70–140 MHz IF signals in LTE/5G base station receivers using undersampling techniques. IC Role / Device Role / Timing Role: High-speed ADC capturing wideband spectrum with minimal harmonic distortion and precise timing alignment via CLK-driven pipeline. Use Value: 82 dB SFDR at 10 MHz and 76 dB SFDR at 40 MHz enable detection of weak adjacent-channel signals in crowded RF environments. |
Use Scenario: Converting analog outputs from X-ray detector arrays or ultrasound transducer elements into digital image data. IC Role / Device Role / Timing Role: Precision digitizer ensuring pixel-level linearity and absence of missing codes across full 53 MSPS frame rates. Use Value: ±0.5 LSB DNL and 69 dB SNR preserve contrast resolution and low-contrast detail visibility in diagnostic-grade images. |
| Test Equipment | CCD Digitizing |
|
Use Scenario: High-bandwidth signal acquisition in automated test systems measuring amplifier distortion and spectral purity. IC Role / Device Role / Timing Role: Reference-grade ADC providing traceable, repeatable measurements with calibrated full-scale ranges and low aperture jitter (1.2 ps rms). Use Value: 2 Vp-p/3 Vp-p flexibility and internal reference allow rapid reconfiguration between low-noise and high-headroom test modes. |
Use Scenario: Reading charge-domain outputs from scientific CCD sensors in spectroscopy and astronomy applications. IC Role / Device Role / Timing Role: Low-DNL, low-noise ADC synchronized to pixel clock for accurate photon-counting histograms. Use Value: 67.5 dB SNR at 2 Vp-p and 335 mW power enable high-resolution, low-dark-current digitization in cooled sensor systems. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed, 12-bit ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS802E/1K | 12-bit, 20 MSPS max; lower power (125 mW); no OTR or CM pin; SSOP-28 package. | Better suited for cost-sensitive, lower-bandwidth test fixtures where SFDR >75 dB is sufficient. | Select when sampling rate ≤20 MSPS and system-level over-range monitoring is handled externally. |
| ADS830E/1K | 12-bit, 60 MSPS max; improved SFDR (85 dB @10 MHz); higher power (420 mW); same SSOP-28 footprint. | Preferred for next-gen 5G massive MIMO receivers requiring extended spurious-free bandwidth. | Choose when SFDR margin >3 dB is required and thermal management supports +85 mW extra dissipation. |
Compared with ADS807E/1K, ADS802E/1K trades speed and feature set for power efficiency, while ADS830E/1K extends SFDR performance at higher power and cost-making ADS807E/1K the balanced choice for 40–53 MSPS IF digitization with integrated biasing and diagnostics.
Availability
ADS807E/1K is available at Aetrix Electronics and suitable for communications base stations, medical imaging subsystems, and automated test equipment requiring stable component supply across extended product lifecycles.
Supply support for ADS807E/1K includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in high-performance data converters and signal chain solutions.
The ADS807E/1K belongs to TI's high-speed precision ADC product line, designed specifically for demanding IF sampling, imaging, and instrumentation applications where dynamic range, linearity, and integrated reference/biasing are critical.
FAQ
What is the maximum sampling rate supported by the ADS807E/1K?
The ADS807E/1K supports a maximum sampling rate of 53 million samples per second (MSPS), as confirmed in its electrical characteristics table under "Conversion Characteristics." This rate is achievable across the full specified temperature range (–40°C to +85°C) with proper power supply decoupling and clock signal integrity. At 53 MSPS, the ADS807E/1K maintains 82 dB SFDR at 10 MHz input frequency and 67.5 dB SNR with 2 Vp-p input range.
Does the ADS807E/1K include an internal voltage reference?
Yes, the ADS807E/1K integrates a precision bandgap-based internal reference with selectable full-scale ranges of 2 Vp-p or 3 Vp-p, controlled by the FSSEL pin. When INT/EXT is pulled LOW, internal reference buffers drive REFT and REFB pins, delivering stable +3.0 V / +2.0 V (2 V mode) or +3.25 V / +1.75 V (3 V mode). The ADS807E/1K datasheet confirms ±10 mV tolerance on REFT/REFB under these conditions.
How does the over-range indicator (OTR) function in the ADS807E/1K?
The OTR pin on the ADS807E/1K is an active-high, open-drain output that asserts when the analog input exceeds the selected full-scale range (2 Vp-p or 3 Vp-p). It operates independently of clock timing and responds within 2 ns of overdrive, as specified in the timing diagram and absolute maximum ratings. This flag is intended for real-time gain control loop feedback-e.g., reducing front-end amplifier gain before clipping occurs-and is electrically compatible with standard 3.3 V or 5 V logic interfaces.
What package type is used for the ADS807E/1K, and what are its thermal characteristics?
The ADS807E/1K is packaged in a 28-pin SSOP (Shrink Small Outline Package) with 0.65 mm lead pitch, designated DB in TI's ordering nomenclature. Its thermal resistance is θJA = 50°C/W under standard JEDEC JESD51-2 conditions. At maximum power dissipation of 390 mW (internal reference, VDRV = 5 V), junction temperature rise above ambient is ≤19.5°C-enabling reliable operation in +85°C ambient environments without forced airflow, provided adequate PCB copper area is allocated for heat spreading.
Can the ADS807E/1K operate with a single-ended analog input?
Yes, the ADS807E/1K supports single-ended operation: one analog input (IN or IN) receives the signal while the other is biased to the common-mode voltage (CM pin output ≈+2.5 V). The datasheet confirms this mode yields 62 dB SFDR at 10 MHz (vs. 82 dB differential), with SNR maintained at 67 dB. Single-ended use reduces circuit complexity but sacrifices harmonic rejection and dynamic range-making it appropriate for time-domain applications like video digitizing where phase coherence is less critical than interface simplicity.
ADS807E/1K Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 28-SSOP (0.209", 5.30mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 53M
- Number of Inputs:
- 1
- Input Type:
- Differential, Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- Pipelined
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 5V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 28-SSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
ADS807E/1K FAQ
1.How can I place an order for ADS807E/1K through Aetrix?
Please submit a Request for Quotation (RFQ) for ADS807E/1K on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADS807E/1K reliable?
The price and inventory of ADS807E/1K are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADS807E/1K is usually 5 days.
3.What payment methods are accepted for ADS807E/1K?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADS807E/1K transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADS807E/1K?
ADS807E/1K orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADS807E/1K order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADS807E/1K?
For technical support, including ADS807E/1K datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADS807E/1K requirements.
6.How does Aetrix verify that ADS807E/1K is sourced from the original manufacturer or authorized distributors?
All ADS807E/1K products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADS807E/1K meets industry standards.
7.What is the process for return or replacement of ADS807E/1K?
All ADS807E/1K units undergo pre-shipment inspection (PSI). If there is an issue with ADS807E/1K, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADS807E/1K part is unused and in its original packaging.
Return procedure for ADS807E/1K:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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