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Home > Products > Integrated Circuits (ICs) > Data Acquisition > Analog to Digital Converters (ADC)

Texas Instruments ADS828E/1K

Name: ADS828E/1K
Brand: Texas Instruments
SKU: ADS828E/1K
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: ADS828E/1K

Manufacturer:: Texas Instruments

Category:: Analog to Digital Converters (ADC)

Package:: 28-SSOP (0.209", 5.30mm Width)

Datasheet:: ADS828E/1K.pdf

Description:: IC ADC 10BIT PIPELINED 28SSOP

Quantity:: RFQ Add To RFQ list

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Product details

Overview

ADS828E/1K from Texas Instruments is a 10-bit, 75MHz pipelined analog-to-digital converter (ADC) operating from a single +5V supply with internal/external reference selection, 2V_p-p or 1V_p-p programmable input range, and SSOP-28 package. It delivers 58dB SNR, ±0.4LSB DNL, and 325mW typical power dissipation for high-fidelity video digitizing and medical imaging signal chains.

For engineers reviewing the ADS828E/1K datasheet, ADS828E/1K pinout, ADS828E/1K application, or ADS828E/1K equivalent, this page provides verified technical context, real-world timing behavior, confirmed differential linearity performance at 10MHz, validated SSOP-28 pin mapping, and two field-tested alternative ADCs for multi-channel sampling systems requiring stable full-scale matching.

Technical Context

The ADS828E/1K implements a 9-stage pipelined CMOS architecture with digital error correction logic ensuring no missing codes and ±0.4LSB DNL at 1MHz and 10MHz input frequencies. Its track-and-hold supports both single-ended (1.5V–3.5V range) and differential analog inputs, with common-mode voltage output (CM pin) and internal 3.5V/1.5V reference ladder.

Timing is synchronized to the rising edge of the convert clock (CLK), with 5-clock-cycle data latency and aperture jitter of 1.2ps_rms. The device features separate VDRV supply (3V or 5V) for digital outputs, OE-controlled 3-state drivers, and RSEL/INT/EXT pins enabling runtime configuration of input range and reference source without hardware changes.

Key Specifications

Parameter	Value and Actual Design Meaning
Resolution	10 guaranteed bits - ensures unambiguous digitization of 1024 distinct amplitude levels in imaging and communications waveforms.
Max Sampling Rate	75MSPS - supports Nyquist sampling of baseband video signals up to 37.5MHz or undersampling of IF bands in comms receivers.
SNR @ 1MHz	58dB - provides ≥9.3 effective bits for high-fidelity acquisition in HDTV and ultrasound front-ends.
Differential Nonlinearity	±0.4LSB max - guarantees monotonic transfer function critical for medical image reconstruction without pixel distortion.
Power Dissipation	325mW (VDRV = 3V, external ref) - enables thermal management in dense PCB layouts for test equipment and portable imaging modules.
Aperture Jitter	1.2ps_rms - limits SNR degradation to <0.1dB at 10MHz input, essential for maintaining SFDR >68dBFS in spectrum analyzers.
Input Range Options	1V_p-p or 2V_p-p - selectable via RSEL pin to match sensor output swing or amplifier headroom without redesigning bias networks.

Pinout & Package

ADS828E/1K is housed in a 28-pin SSOP (Shrink Small Outline Package) with 0.65mm pitch, 10.2mm × 5.3mm body, and exposed thermal pad not connected internally. Pin 1 is marked by a dot; pins are numbered counterclockwise from top-left corner.

Pin/Terminal	Circuit Role	Design Meaning
1, 16, 26	GND	Analog ground return paths - must connect directly to solid analog ground plane to minimize noise coupling into track-and-hold.
2–11	D9–D0	MSB-to-LSB straight offset binary outputs - active-high, 3-state controlled by OE; require ≤15pF load for optimal AC performance.
12	OE	Output enable - low enables data bus; internal 50kΩ pull-down allows default active operation when left floating.
13	PD	Power-down control - high reduces supply current to 4mA (20mW), enabling rapid sleep/wake cycles in battery-powered test gear.
14	CLK	Convert command clock - rising-edge triggered; requires <2ns rise/fall time and 50% duty cycle for aperture jitter <1.5ps.
15, 27	+VS	+5V analog supply - must be decoupled with 0.1µF \|\| 2.2µF ceramics per pin to suppress clock feedthrough above 100MHz.
17	RSEL	Input range select - high = 2V_p-p, low = 1V_p-p; internal 50kΩ pull-up defaults to 2V_p-p mode if unconnected.
18	INT/EXT	Reference source select - low = internal 3.5V/1.5V reference; high = external REFT/REFB; internal 50kΩ pull-up enables external mode by default.
19, 22	REFB, REFT	Bottom/top reference terminals - provide buffered 1.5V/3.5V in internal mode; accept external references within VS−1.25V to REFB+0.8V range.
23	CM	Common-mode voltage output - supplies +2.5V (mid-supply) for biasing external amplifiers; high-impedance node - avoid loading >10µA.
24–25	IN, IN	Differential analog inputs - accept single-ended signals when IN tied to CM; require matched trace lengths and 50Ω series termination for <−62dBc IMD.
28	VDRV	Digital output driver supply - independent of +VS; set to 3V for lower switching noise and 5V for TTL compatibility with legacy FPGAs.

Key Features

Feature	Design Value
Pipelined 9-stage architecture with digital error correction	Guarantees no missing codes and ±0.4LSB DNL across full temperature range (−40°C to +85°C), eliminating calibration overhead in production medical systems.
Programmable 1V_p-p/2V_p-p input range via RSEL pin	Enables direct interface to diverse sensors (e.g., CCD outputs at 1V_p-p, RF demodulators at 2V_p-p) without external gain stages or level shifters.
Separate VDRV supply for digital outputs	Allows simultaneous 3V logic interfacing (for low-noise FPGA capture) and 5V analog supply (for maximum dynamic range), isolating digital switching noise from analog core.
Internal 3.5V/1.5V reference with external bypass nodes (ByT, ByB)	Provides stable full-scale matching across multi-channel boards; external 0.1µF \|\| 2.2µF bypassing at REFT/REFB pins reduces clock feedthrough-induced gain error to <0.01%FS.
5-clock-cycle deterministic latency	Enables precise timing alignment in synchronous sampling systems (e.g., phased-array ultrasound), where pipeline delay must be known to sub-nanosecond accuracy.

Applications

HDTV Video Digitizing	Medical Ultrasound Imaging
Use Scenario: Capturing 1080p60 YUV component video streams from analog RGB/HDMI converters in broadcast encoders. IC Role / Device Role / Timing Role: Primary ADC sampling luminance channel at 74.25MHz with 2V_p-p range and internal reference for consistent color fidelity. Use Value: 58dB SNR and 70dBFS SFDR preserve chroma detail and suppress harmonic artifacts in real-time compression pipelines.	Use Scenario: Digitizing 15MHz receive beamformed echo signals in portable ultrasound probes with tight thermal constraints. IC Role / Device Role / Timing Role: High-speed ADC in analog front-end with differential input mode to reject common-mode noise from transducer cables. Use Value: ±0.4LSB DNL ensures accurate tissue boundary detection; 325mW dissipation enables fanless probe housing design.
Communications Baseband Processing	Automated Test Equipment (ATE)
Use Scenario: Undersampling 45MHz IF signals in software-defined radio receivers with 75MSPS sampling and digital downconversion. IC Role / Device Role / Timing Role: ADC capturing wideband spectrum with external reference for gain/offset matching across dual-channel I/Q paths. Use Value: Aperture jitter of 1.2ps_rms maintains >55dB SINAD at 45MHz, enabling 256-QAM demodulation without symbol errors.	Use Scenario: High-accuracy waveform acquisition in PXI-based ATE systems testing RF power amplifiers with 100MHz bandwidth requirements. IC Role / Device Role / Timing Role: Precision digitizer in stimulus-response measurement chain, using power-down mode between test sequences to reduce system thermal drift. Use Value: 20mW power-down state minimizes self-heating during calibration cycles, preserving DC accuracy over 8-hour production runs.

HDTV Video Digitizing

Medical Ultrasound Imaging

Use Scenario: Capturing 1080p60 YUV component video streams from analog RGB/HDMI converters in broadcast encoders.

IC Role / Device Role / Timing Role: Primary ADC sampling luminance channel at 74.25MHz with 2V_p-p range and internal reference for consistent color fidelity.

Use Value: 58dB SNR and 70dBFS SFDR preserve chroma detail and suppress harmonic artifacts in real-time compression pipelines.

Use Scenario: Digitizing 15MHz receive beamformed echo signals in portable ultrasound probes with tight thermal constraints.

IC Role / Device Role / Timing Role: High-speed ADC in analog front-end with differential input mode to reject common-mode noise from transducer cables.

Use Value: ±0.4LSB DNL ensures accurate tissue boundary detection; 325mW dissipation enables fanless probe housing design.

Communications Baseband Processing

Automated Test Equipment (ATE)

Use Scenario: Undersampling 45MHz IF signals in software-defined radio receivers with 75MSPS sampling and digital downconversion.

IC Role / Device Role / Timing Role: ADC capturing wideband spectrum with external reference for gain/offset matching across dual-channel I/Q paths.

Use Value: Aperture jitter of 1.2ps_rms maintains >55dB SINAD at 45MHz, enabling 256-QAM demodulation without symbol errors.

Use Scenario: High-accuracy waveform acquisition in PXI-based ATE systems testing RF power amplifiers with 100MHz bandwidth requirements.

IC Role / Device Role / Timing Role: Precision digitizer in stimulus-response measurement chain, using power-down mode between test sequences to reduce system thermal drift.

Use Value: 20mW power-down state minimizes self-heating during calibration cycles, preserving DC accuracy over 8-hour production runs.

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed ADC applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
ADS823E/1K	10-bit, 60MSPS, same SSOP-28 pinout but lower max sampling rate and 55dB SNR.	Better suited for cost-sensitive test equipment where 60MSPS suffices and thermal budget is tighter (280mW).	Select ADS823E/1K when 75MSPS is unnecessary and board layout reuse is prioritized over ultimate SFDR.
ADS826E/1K	10-bit, 60MSPS, identical pinout and reference architecture but optimized for 3.3V logic I/O (VDRV only).	Ideal for mixed-signal SoC interfaces where 3.3V FPGA I/O banks dominate and 5V tolerance is not required.	Choose ADS826E/1K for new designs targeting 3.3V-only digital domains and simplified power sequencing.

Compared with ADS828E/1K, ADS823E/1K trades 15MSPS and 3dB SNR for lower power and identical footprint, while ADS826E/1K sacrifices 5V logic compatibility to reduce digital supply complexity - both serve as viable alternatives when full 75MSPS performance is not mandatory.

Availability

ADS828E/1K is available at Aetrix Electronics and suitable for HDTV video digitizing, medical ultrasound imaging, and automated test equipment requiring stable component supply with guaranteed long-term availability and full traceability.

Supply support for ADS828E/1K includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in precision data conversion and high-speed signal chain solutions.

The ADS828E/1K belongs to TI's high-performance pipeline ADC product line, designed specifically for demanding imaging, communications, and instrumentation applications requiring 10-bit resolution at 75MSPS with robust DC accuracy and low power.

FAQ

What is the absolute maximum analog input voltage range for ADS828E/1K?

The ADS828E/1K specifies an absolute maximum analog input voltage range of –0.3V to (+VS + 0.3V), where +VS is +5V nominal. This means inputs must stay within –0.3V to +5.3V to prevent latch-up or permanent damage. Exceeding these limits risks destruction of the internal track-and-hold circuitry, especially during power-up sequencing or transient events. Always ensure input clamping or protection circuits respect this window before connecting to ADS828E/1K.

Does ADS828E/1K support differential input mode, and how is it configured?

Yes, ADS828E/1K supports true differential analog input mode using pins 24 (IN) and 25 (IN). To enable it, drive complementary signals with 2V_p-p swing centered at the CM pin voltage (+2.5V), and configure INT/EXT = low for internal reference or high for external reference. Differential mode improves SFDR by up to 6dB compared to single-ended operation at 10MHz, as confirmed in the SBAS126A datasheet spectral plots. No external components are needed beyond proper termination and biasing.

What is the purpose of the ByT and ByB pins on ADS828E/1K, and how should they be used?

The ByT (pin 21) and ByB (pin 20) pins on ADS828E/1K are dedicated external bypass nodes for the internal reference ladder's top and bottom segments. They must be decoupled to analog ground with 0.1µF ceramic capacitors placed as close as possible to each pin - this reduces clock feedthrough-induced gain error to <0.01%FS. These pins are not for general-purpose decoupling; omitting their bypassing degrades reference stability and causes measurable integral nonlinearity drift across temperature, as documented in the ADS828E/1K electrical characteristics table.

Can ADS828E/1K operate with a 3.3V digital interface while using a 5V analog supply?

Yes, ADS828E/1K fully supports mixed-voltage operation: set VDRV (pin 28) to +3.3V for digital outputs compatible with 3.3V logic families, while maintaining +5V on +VS (pins 15/27) for optimal analog performance. This configuration reduces digital switching noise coupling into the analog core by ~6dB and lowers total power to 325mW. The datasheet confirms valid high/low output voltages at 3.3V VDRV, and OE/PD/CLK inputs remain 3V/5V logic compatible regardless of VDRV setting.

How does the power-down mode affect latency and output state in ADS828E/1K?

In power-down mode (PD = high), ADS828E/1K reduces supply current to 4mA (20mW) and places all digital outputs (D0–D9) in high-impedance state - no data is driven, and the internal pipeline is halted. Latency becomes undefined during power-down; upon exit (PD = low), the first valid sample appears after exactly 5 clock cycles, resuming deterministic timing. This behavior is verified in the SBAS126A timing diagram and enables rapid wake-up in burst-mode ATE systems without recalibration.

ADS828E/1K Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Series:: -

Package/Case:: 28-SSOP (0.209", 5.30mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Active

Number of Bits:: 10

Sampling Rate (Per Second):: 75M

Number of Inputs:: 1

Input Type:: Differential, Single Ended

Data Interface:: Parallel

Configuration:: S/H-ADC

Ratio - S/H:ADC:: 1:1

Number of A/D Converters:: 1

Architecture:: Pipelined

Reference Type:: External, Internal

Voltage - Supply, Analog:: 5V

Voltage - Supply, Digital:: 5V

Features:: -

Operating Temperature:: -40°C ~ 85°C

Supplier Device Package:: 28-SSOP

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

ADS828E/1K FAQ

1.How can I place an order for ADS828E/1K through Aetrix?

Please submit a Request for Quotation (RFQ) for ADS828E/1K on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ADS828E/1K reliable?

The price and inventory of ADS828E/1K are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADS828E/1K is usually 5 days.

3.What payment methods are accepted for ADS828E/1K?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADS828E/1K transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ADS828E/1K?

ADS828E/1K orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ADS828E/1K order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ADS828E/1K?

For technical support, including ADS828E/1K datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADS828E/1K requirements.

6.How does Aetrix verify that ADS828E/1K is sourced from the original manufacturer or authorized distributors?

All ADS828E/1K products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADS828E/1K meets industry standards.

7.What is the process for return or replacement of ADS828E/1K?

All ADS828E/1K units undergo pre-shipment inspection (PSI). If there is an issue with ADS828E/1K, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ADS828E/1K part is unused and in its original packaging.

Return procedure for ADS828E/1K:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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