Texas Instruments ADS8328IBRSAR
- Part No.:
- ADS8328IBRSAR
- Manufacturer:
- Texas Instruments
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 16-VQFN Exposed Pad
- Datasheet:
-
ADS8328IBRSAR.pdf
- Description:
- IC ADC 16BIT SAR 16QFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,954
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ADS8328IBRSAR from Texas Instruments is a 16-bit, 500-kSPS pseudo-differential SAR analog-to-digital converter with integrated 2:1 input multiplexer, programmable TAG bit output, and SPI/DSP-compatible serial interface. It operates from 2.7 V to 5.5 V analog supply, delivers ±1 LSB max DNL and ±1.5 LSB max INL, and supports daisy-chain mode for multi-channel data acquisition in industrial process control systems.
For engineers reviewing the ADS8328IBRSAR datasheet, ADS8328IBRSAR pinout, ADS8328IBRSAR application, or ADS8328IBRSAR equivalent, key selection considerations include its dual-channel pseudo-differential input architecture, 100 dB SFDR at 10 kHz, built-in conversion clock (10.9–12.6 MHz), deep power-down mode (6 nA), and QFN-16 (4×4 mm) package with exposed thermal pad.
Technical Context
The ADS8328IBRSAR implements a capacitor-based successive approximation register (SAR) core with inherent sample-and-hold, supporting both manual and auto-triggered conversion modes. Its 2:1 MUX enables channel selection between +IN0/COM and +IN1/COM, with programmable TAG bit indicating active channel in chain mode.
Conversion timing is governed by an internal CCLK (derived from SCLK or oscillator), requiring 18 CCLK cycles per conversion and 3 CCLK acquisition time. Serial interface complies with SPI Mode 0/3 and TMS320 DSP frame sync protocols, supporting up to 21 MHz SCLK when used as I/O clock only.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 16-bit with no missing codes - guarantees monotonicity and full code coverage across temperature. |
| Sampling Rate | 500 kSPS maximum throughput - enables real-time capture of signals up to ~200 kHz Nyquist bandwidth. |
| INL / DNL | ±1.5 LSB max INL, ±1 LSB max DNL - ensures high-precision measurement accuracy in transducer and sensor interfaces. |
| SFDR / SNR | 100 dB SFDR, 91 dB SNR at 10 kHz - supports high-fidelity signal reconstruction in medical instrumentation and communications. |
| Power Consumption | 25.4 mW at +VA = 5 V, +VBD = 1.8 V - balances performance and low-power operation for battery-backed or energy-constrained systems. |
| Reference Input | External 2.5 V or 4.096 V reference (REF+ to REF−) - allows flexible full-scale range setting and improved system gain matching. |
| Operating Temp | –40°C to +85°C - fully specified for industrial environments including factory automation and motor control. |
Pinout & Package
The ADS8328IBRSAR is housed in a 16-pin QFN package (4 mm × 4 mm, RSA designation) with wettable flank leads and an exposed thermal pad internally connected to substrate (recommended to connect to AGND).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| +VA | Analog supply input | 2.7 V to 5.5 V analog rail powering SAR core, reference buffer, and input MUX - decoupling required near pin. |
| +VBD | Digital I/O supply | 1.65 V to 5.5 V interface rail for SDO/SDI/SCLK/FS/CS - enables level-shifting with host controller logic. |
| AGND / BDGND | Analog and digital grounds | Separate ground pins minimize noise coupling; BDGND must be tied to system digital ground, AGND to analog ground plane. |
| +IN0 / +IN1 | Pseudo-differential inputs | Two independent noninverting inputs; COM serves as common inverting node - supports differential or single-ended unipolar configurations. |
| COM | Common inverting input | Shared reference point for both channels; typically tied to AGND or system common-mode voltage. |
| REF+ / REF− | External reference terminals | Accept precision external reference (e.g., 4.096 V); REF− must be connected to AGND via low-inductance path. |
| CONVST | Conversion start trigger | Edge-sensitive input that freezes sample-and-hold and initiates conversion on next internal clock edge - global across channels. |
| EOC/INT/CDI | Status/chain data terminal | Configurable as end-of-conversion flag, interrupt, or daisy-chain data input - enables synchronized multi-device readout. |
| FS/CS | Frame sync / chip select | Active-low SPI slave select or TMS320 frame sync - controls serial interface enable and data framing. |
| SCLK / SDI / SDO | Serial interface signals | Standard SPI clock/data lines supporting 21 MHz SCLK (I/O only) or 12.6 MHz (I/O + conversion clock) - MSB-first straight binary format. |
Key Features
| Feature | Design Value |
|---|---|
| 2:1 Input Multiplexer | Hardware-selectable dual-channel input with automatic or manual channel sequencing - eliminates external analog switches in dual-sensor systems. |
| Programmable TAG Bit | Embedded channel identifier bit appended to each 16-bit conversion result - enables unambiguous channel attribution in daisy-chain configurations. |
| Built-in Conversion Clock | Internal 10.9–12.6 MHz CCLK derived from SCLK or internal oscillator - removes need for external clock source and simplifies layout. |
| Multi-Chip Daisy Chain | Single SCLK/SDI line drives multiple ADS8328 devices with CDI/SDO cascading - reduces GPIO count and PCB routing complexity. |
| Three Power-Down Modes | Deep power-down (6 nA), Nap (0.3 mA), and Auto-Nap (self-timed entry/exit) - optimizes energy use in intermittent sampling applications. |
Applications
| Industrial Process Control | Medical Instrumentation |
|---|---|
Use Scenario: Monitoring pressure, temperature, and flow sensors in PLC-based control cabinets with tight EMI constraints. IC Role / Device Role / Timing Role: Dual-channel ADC digitizing isolated 4–20 mA loop outputs with simultaneous sampling and channel-tagged results. Use Value: ±1 LSB DNL and 100 dB SFDR ensure accurate calibration traceability; QFN-16 package supports compact, thermally stable PCB layouts. | Use Scenario: High-resolution waveform capture in portable ECG and EEG front-ends requiring low power and minimal board space. IC Role / Device Role / Timing Role: Pseudo-differential ADC acquiring biopotential signals with COM referenced to right-leg drive, rejecting common-mode interference. Use Value: 91 dB SNR at 10 kHz preserves diagnostic fidelity; deep power-down mode extends battery life between patient measurements. |
| Magnetometers | Automatic Test Equipment |
Use Scenario: Digitizing low-noise fluxgate or AMR sensor outputs in navigation-grade inertial measurement units (IMUs). IC Role / Device Role / Timing Role: Low-drift ADC converting differential magnetic field signals with programmable gain stage interfacing. Use Value: ±0.4 mV max offset error at 5 V and 0.5 ppm/°C drift maintain absolute field accuracy over temperature; 16-bit resolution resolves sub-nT changes. | Use Scenario: Multi-channel voltage/current measurement in modular ATE rack systems requiring synchronized sampling across dozens of DUTs. IC Role / Device Role / Timing Role: Daisy-chained ADC node providing timestamp-aligned 16-bit samples to FPGA controller via shared SCLK/SDI bus. Use Value: EOC/INT polarity programming and CDI-driven chain synchronization eliminate inter-device skew; 500 kSPS throughput meets production test cycle time targets. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS8327IBRSAR | Single-channel variant without MUX or TAG bit; identical INL/DNL, power, and timing specs. | Lacks dual-input capability and channel identification - suitable only for single-sensor systems. | Select when only one analog input is required and board space allows same QFN-16 footprint. |
| AD7682BCPZ | 16-bit, 250 kSPS PulSAR ADC; SPI interface, no internal clock; requires external conversion control. | Lower throughput and no daisy-chain support; superior DC specs (±0.5 LSB INL) but higher power at full rate. | Prefer for ultra-high-precision DC-critical applications where 250 kSPS suffices and external timing control is acceptable. |
Compared with ADS8327IBRSAR and AD7682BCPZ, the ADS8328IBRSAR uniquely combines dual-channel pseudo-differential input, embedded TAG bit, and internal CCLK - enabling compact, synchronized multi-sensor acquisition without external timing or logic.
Availability
ADS8328IBRSAR is available at Aetrix Electronics and suitable for industrial process control, medical instrumentation, magnetometer signal conditioning, and automatic test equipment requiring stable component supply and long-term manufacturability.
Supply support for ADS8328IBRSAR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions for industrial, automotive, and personal electronics markets.
The ADS8328 belongs to TI's precision SAR ADC product line, engineered for high-resolution data acquisition in noise-sensitive, power-constrained, and space-limited applications requiring true 16-bit performance without calibration.
FAQ
What is the maximum external SCLK frequency supported by the ADS8328IBRSAR?
The ADS8328IBRSAR supports up to 50 MHz SCLK when used solely as an I/O clock, and up to 21 MHz when SCLK also serves as the conversion clock source. At 21 MHz, the device achieves its rated 500 kSPS throughput with 18-cycle conversion time and 3-cycle acquisition window, ensuring deterministic timing for real-time control loops.
Does the ADS8328IBRSAR require an external reference voltage?
Yes, the ADS8328IBRSAR requires an external reference applied between REF+ and REF− pins. It accepts 2.5 V or 4.096 V references depending on analog supply voltage (+VA), with REF− tied directly to AGND. No internal reference is provided; accuracy and stability depend entirely on the external reference source.
How does the programmable TAG bit function in the ADS8328IBRSAR?
The TAG bit in ADS8328IBRSAR is a configurable output appended to each 16-bit conversion result, indicating which input channel (+IN0 or +IN1) was sampled. In daisy-chain mode, it enables unambiguous channel identification across multiple devices without additional GPIO or software tracking - critical for synchronized multi-sensor systems.
What are the power-down current levels for the ADS8328IBRSAR?
The ADS8328IBRSAR offers three power-down states: Deep power-down draws 6 nA typical (max 50 nA), Nap mode consumes 0.3 mA typical (max 0.5 mA), and Auto-Nap automatically enters/exits Nap based on CONVST activity. These modes allow dynamic power scaling in battery-powered or thermally constrained applications while preserving configuration registers.
Can the ADS8328IBRSAR operate with separate analog and digital supply voltages?
Yes, the ADS8328IBRSAR uses independent supplies: +VA (2.7 V to 5.5 V) powers the analog core and reference circuitry, while +VBD (1.65 V to 5.5 V) powers digital I/O buffers. This separation allows level-shifting between host processor logic and ADC interface, reduces digital switching noise coupling into analog sections, and supports mixed-voltage system architectures.
ADS8328IBRSAR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-VQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- 500k
- Number of Inputs:
- 2
- Input Type:
- Differential, Single Ended
- Data Interface:
- SPI
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 1.65V ~ 5.5V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 16-QFN (4x4)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
ADS8328IBRSAR FAQ
1.How can I place an order for ADS8328IBRSAR through Aetrix?
Please submit a Request for Quotation (RFQ) for ADS8328IBRSAR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADS8328IBRSAR reliable?
The price and inventory of ADS8328IBRSAR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADS8328IBRSAR is usually 5 days.
3.What payment methods are accepted for ADS8328IBRSAR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADS8328IBRSAR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADS8328IBRSAR?
ADS8328IBRSAR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADS8328IBRSAR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADS8328IBRSAR?
For technical support, including ADS8328IBRSAR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADS8328IBRSAR requirements.
6.How does Aetrix verify that ADS8328IBRSAR is sourced from the original manufacturer or authorized distributors?
All ADS8328IBRSAR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADS8328IBRSAR meets industry standards.
7.What is the process for return or replacement of ADS8328IBRSAR?
All ADS8328IBRSAR units undergo pre-shipment inspection (PSI). If there is an issue with ADS8328IBRSAR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADS8328IBRSAR part is unused and in its original packaging.
Return procedure for ADS8328IBRSAR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ADS8328IBRSAR Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

