Texas Instruments ADS8860IDGSR
- Part No.:
- ADS8860IDGSR
- Manufacturer:
- Texas Instruments
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
ADS8860IDGSR.pdf
- Description:
- IC ADC 16BIT SAR 10VSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:1,000
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ADS8860IDGSR from Texas Instruments is a 16-bit, 1-MSPS, single-ended input SAR analog-to-digital converter with SPI-compatible serial interface, unipolar input range (0 V to VREF), and micropower operation. It features no-latency output, 93 dB SNR, ±2.0 LSB max INL, and operates from AVDD = 2.7–3.6 V, DVDD = 1.65–3.6 V, and REF = 2.5–5 V. It is used in precision medical instruments and low-power battery-operated data acquisition systems.
For engineers reviewing the ADS8860IDGSR datasheet, ADS8860IDGSR pinout, ADS8860IDGSR application, or ADS8860IDGSR equivalent, key selection considerations include its 1-MSPS throughput with 5.5 mW power at full speed, daisy-chain capability for multi-channel systems, independent dual-supply operation (AVDD/DVDD), and reference voltage flexibility up to 5 V without scaling circuitry.
Technical Context
The ADS8860IDGSR implements a successive approximation register (SAR) architecture with internal capacitive DAC and track-and-hold, delivering true 16-bit no-missing-code performance. Its conversion time is 500–710 ns, with full-scale step settling to 16 bits in 290 ns, enabling precise timing-critical sampling in high-resolution instrumentation.
It supports three serial interface modes - 3-wire (CONVST as CS), 4-wire (DIN as CS), and daisy-chain - all SPI-compatible and configurable via DIN level at conversion start. The busy-indicator bit option simplifies synchronization with digital hosts such as microcontrollers or FPGAs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 16-bit with guaranteed no missing codes (NMC), enabling direct use in metrology-grade applications without post-processing correction. |
| Sample rate | 1 MSPS maximum throughput; supports real-time capture of signals up to ~30 MHz small-signal bandwidth. |
| SNR / THD | 93 dB SNR and –108 dB THD at 1 kHz (VREF = 5 V), supporting high-fidelity signal digitization in precision test equipment. |
| INL / DNL | ±2.0 LSB max INL and ±1.0 LSB max DNL ensure accurate end-point linearity for calibration-sensitive systems like ATE. |
| Power dissipation | 5.5 mW at 1 MSPS, 0.55 mW at 100 kSPS, and 55 µW at 10 kSPS - scalable consumption ideal for adaptive-speed portable instruments. |
| Reference range | 2.5 V to 5 V, independent of AVDD, allowing direct interfacing to standard reference ICs (e.g., REF5025, REF5050) without level-shifting. |
| Supply independence | DVDD (1.65–3.6 V) operates independently from AVDD (2.7–3.6 V), enabling mixed-voltage system integration with 1.8-V or 3.3-V digital controllers. |
Pinout & Package
The ADS8860IDGSR is packaged in a 10-pin VSSOP (DGS) with 3.00 mm × 3.00 mm body size and exposed thermal pad (not electrically connected). Pin functions are validated per TI SBAS569B Rev B.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| REF | Analog reference input | Accepts 2.5–5 V external reference; decoupling ≥10 µF required; return path tied internally to GND. |
| AINP | Analog input (+) | Single-ended analog input node; full-scale range = 0 V to VREF; input capacitance = 59 pF. |
| AINN | Analog input (–) | Ground-referenced input node; supports pseudo-differential mode only when externally biased; not differential input pair. |
| AVDD | Analog supply | 2.7–3.6 V analog rail; must be decoupled to GND with 1-µF capacitor; powers internal SAR core and reference buffer. |
| DVDD | Digital I/O supply | 1.65–3.6 V digital rail; powers serial interface logic; decoupled to GND with 1-µF capacitor. |
| GND | Common analog/digital ground | Shared return for AVDD, DVDD, and REF; requires low-impedance PCB connection to minimize noise coupling. |
| CONVST | Convert start / chip select | Rising edge initiates conversion; doubles as CS in 3-wire mode; minimum pulse width = 10 ns. |
| DIN | Serial data input | Configures interface mode (CS vs daisy-chain) at conversion start; also serves as CS in 4-wire mode. |
| DOUT | Serial data output | MSB-first, SPI-compatible output; tri-state controlled by CONVST or SCLK edge depending on mode. |
| SCLK | Serial clock input | Up to 66.6 MHz clock; data valid on falling edge; timing critical for 1-MSPS throughput alignment. |
Key Features
| Feature | Design Value |
|---|---|
| No-latency output | Delivers conversion result immediately after completion - eliminates pipeline delay, critical for closed-loop control and real-time triggering. |
| Daisy-chain support | Enables cascading multiple ADS8860IDGSR devices on a single SPI bus without additional GPIO, reducing host pin count in multi-channel DAQ systems. |
| Independent AVDD/DVDD supplies | Allows simultaneous operation with 1.8-V FPGA I/O and 3.3-V analog front-end, avoiding level translators and simplifying power domain partitioning. |
| 50 nA power-down current | Permits ultra-low-quiescent operation between conversions - extends battery life in intermittent-sampling portable instruments beyond 10 years. |
| Full-scale step settling (290 ns) | Ensures accurate digitization of fast transients and step inputs without acquisition window extension or timing margin penalties. |
Applications
| Automatic Test Equipment (ATE) | Instrumentation & Process Control |
|---|---|
|
Use Scenario: High-accuracy DC parametric testing of semiconductor devices requiring stable 16-bit resolution and repeatability across temperature. IC Role / Device Role / Timing Role: Primary digitizer for voltage/current measurement subsystem; synchronized to system controller via CONVST edge. Use Value: ±2.0 LSB max INL and 93 dB SNR enable sub-0.001% measurement accuracy without software calibration; daisy-chain mode scales channel count without bus contention. |
Use Scenario: Analog sensor signal conditioning in industrial PLC modules where long-term stability and low drift are mandatory. IC Role / Device Role / Timing Role: Front-end ADC for RTD, thermocouple, or strain gauge interfaces; operates continuously at 100 kSPS with 0.55 mW power. Use Value: Offset error drift ≤ ±1.5 µV/°C and gain error drift ≤ ±0.15 ppm/°C ensure <10 ppm total error over –40°C to +85°C operating range. |
| Precision Medical Equipment | Low-Power Battery-Operated Instruments |
|
Use Scenario: ECG/EEG signal acquisition in portable diagnostic devices demanding high dynamic range and low noise floor. IC Role / Device Role / Timing Role: Signal chain ADC capturing biopotential waveforms; configured in 4-wire mode for deterministic timing with ARM Cortex-M host. Use Value: 93 dB SNR and –108 dB THD preserve subtle waveform morphology; 55 µW power at 10 kSPS enables >1-week runtime on coin-cell batteries. |
Use Scenario: Handheld multimeter or environmental sensor logger requiring extended field deployment without recharging. IC Role / Device Role / Timing Role: Core ADC in energy-harvesting or duty-cycled measurement node; enters 50 nA power-down state between samples. Use Value: Micropower scaling (5.5 mW → 55 µW across 1 MSPS → 10 kSPS) matches processing load; REF independence allows direct use of low-dropout reference ICs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS8864IDRCR | 400 kSPS, 16-bit, true-differential input; higher power (7.2 mW at 400 kSPS); same VSSOP-10 package. | Requires differential sensor interface; unsuitable for single-ended legacy designs without front-end redesign. | Select when differential signaling improves noise immunity in noisy industrial environments. |
| ADS8862IDRCR | 680 kSPS, 16-bit, true-differential input; 6.5 mW at 680 kSPS; identical pinout but different functional mode mapping. | Lacks daisy-chain support; requires separate CS lines per device in multi-channel systems. | Choose for higher throughput than ADS8860IDGSR where differential inputs are available and layout space permits discrete CS routing. |
Compared with ADS8860IDGSR, ADS8864IDRCR offers lower speed but superior common-mode rejection (100 dB CMRR), while ADS8862IDRCR provides faster sampling but removes daisy-chain flexibility - making ADS8860IDGSR optimal for cost-sensitive, single-ended, multi-device SPI-bus constrained designs.
Availability
ADS8860IDGSR is available at Aetrix Electronics and suitable for automatic test equipment, precision instrumentation, and portable medical devices requiring stable component supply, long-lifecycle support, and consistent parametric performance across production batches.
Supply support for ADS8860IDGSR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog and embedded processing technologies, with leadership in precision data converters, power management, and signal chain solutions.
The ADS8860IDGSR belongs to TI's precision SAR ADC product line, designed specifically for high-resolution, low-power, and space-constrained applications including portable instrumentation, industrial sensing, and medical diagnostics.
FAQ
What is the maximum sample rate of the ADS8860IDGSR?
The ADS8860IDGSR achieves a maximum throughput rate of 1 MSPS with no latency output. At this rate, conversion time is 500–710 ns and acquisition time is 290 ns. The device maintains full 16-bit performance across its entire operating temperature range (–40°C to +85°C), and timing parameters are specified for AVDD = 3 V, DVDD = 3 V, and VREF = 5 V per SBAS569B Rev B.
Does the ADS8860IDGSR support daisy-chain configuration?
Yes, the ADS8860IDGSR supports daisy-chain operation for cascading multiple devices on a single SPI bus. In this mode, DOUT of one device connects to DIN of the next, with shared SCLK and CONVST. Configuration is set by DIN level at conversion start, and timing parameters (e.g., tsu-DI-CK = 1.5 ns) are explicitly defined in Section 7.8 of the ADS8860IDGSR datasheet.
What are the supply voltage requirements for ADS8860IDGSR?
The ADS8860IDGSR requires two independent supplies: AVDD = 2.7 V to 3.6 V for analog circuitry, and DVDD = 1.65 V to 3.6 V for digital I/O - with no dependency between them. REF accepts 2.5 V to 5 V. All supplies must be decoupled: 1 µF for AVDD/DVDD, and ≥10 µF for REF. These ranges are validated across –40°C to +85°C per Recommended Operating Conditions (Section 7.3).
What is the input configuration of the ADS8860IDGSR?
The ADS8860IDGSR features a unipolar, single-ended input architecture with AINP referenced to AINN (tied to GND). It does not support true differential input. The input range is 0 V to VREF, with an extended operating range of –0.1 V to VREF + 0.1 V. Input capacitance is 59 pF, and leakage current is ≤5 nA during acquisition - confirmed in Electrical Characteristics (Section 7.5).
How does power consumption scale with sample rate in ADS8860IDGSR?
ADS8860IDGSR power consumption scales linearly with throughput: 5.5 mW at 1 MSPS, 0.55 mW at 100 kSPS, and 55 µW at 10 kSPS. This behavior stems from its micropower SAR architecture, where internal circuitry activates only during conversion. Power-down current is 50 nA - verified in Section 7.5 under "Device power-down current" with AVDD = 3 V.
ADS8860IDGSR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- microPOWER™
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- 1M
- Number of Inputs:
- 1
- Input Type:
- Pseudo-Differential, Single Ended
- Data Interface:
- SPI
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External
- Voltage - Supply, Analog:
- 2.7V ~ 3.6V
- Voltage - Supply, Digital:
- 1.65V ~ 3.6V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 10-VSSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
ADS8860IDGSR FAQ
1.How can I place an order for ADS8860IDGSR through Aetrix?
Please submit a Request for Quotation (RFQ) for ADS8860IDGSR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADS8860IDGSR reliable?
The price and inventory of ADS8860IDGSR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADS8860IDGSR is usually 5 days.
3.What payment methods are accepted for ADS8860IDGSR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADS8860IDGSR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADS8860IDGSR?
ADS8860IDGSR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADS8860IDGSR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADS8860IDGSR?
For technical support, including ADS8860IDGSR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADS8860IDGSR requirements.
6.How does Aetrix verify that ADS8860IDGSR is sourced from the original manufacturer or authorized distributors?
All ADS8860IDGSR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADS8860IDGSR meets industry standards.
7.What is the process for return or replacement of ADS8860IDGSR?
All ADS8860IDGSR units undergo pre-shipment inspection (PSI). If there is an issue with ADS8860IDGSR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADS8860IDGSR part is unused and in its original packaging.
Return procedure for ADS8860IDGSR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ADS8860IDGSR Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
