Texas Instruments ADS901E

Overview

ADS901E from Texas Instruments is a 10-bit, 20 MSPS pipelined analog-to-digital converter operating from a +3V single supply, featuring wideband track/hold (350 MHz small-signal bandwidth), digital error correction for no missing codes, and CMOS-compatible 3-state digital outputs. It is used in high-fidelity video digitization and telecom signal acquisition where SNR ≥53 dB at 500 kHz and SFDR ≥50 dBFS are required.

For engineers reviewing the ADS901E datasheet, ADS901E pinout, ADS901E application, or ADS901E equivalent, this page delivers verified electrical parameters (e.g., 5-cycle data latency, ±0.8 LSB DLE at 500 kHz), package-specific layout guidance (SSOP-28), real-world interface constraints (external REFT/REFB reference setup), and validated alternative options for imaging and communications systems.

Technical Context

The ADS901E implements a 9-stage pipelined quantizer architecture with two-bit per stage resolution and redundant bits fed into a digital error correction circuit, guaranteeing monotonicity and no missing codes across its –40°C to +85°C operating range. Its differential track/hold accepts single-ended inputs and generates a fully differential held signal referenced to VCM = (REFT + REFB)/2.

It uses straight offset binary coding, requires external references on pins 22 (REFT) and 24 (REFB) to set a 1 V_p-p full-scale input range (e.g., +1 V to +2 V), and supports power-down mode via pin 17 (Pwrdn) that reduces dissipation from 49 mW to 15 mW while placing outputs in high-impedance state.

Key Specifications

Pinout & Package

ADS901E is housed in a 28-pin SSOP (Shrink Small Outline Package) with 0.65 mm pitch, JEDEC MO-153 compliant, moisture sensitivity level 2 (260°C peak reflow), and marked "ADS901E" on top. Thermal resistance θ_JA = 89°C/W.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed 10-bit ADC applications.

Compared with ADS901E, ADS902E trades speed for resolution and DC precision, while MAX1186EEE+ offers double the sampling rate but eliminates flexible external reference control-making ADS901E optimal for cost-sensitive, externally referenced 20 MSPS video and imaging systems.

Availability

ADS901E is available at Aetrix Electronics and suitable for camcorders, digital cameras, computer scanners, and communications test equipment requiring stable component supply across industrial temperature ranges (–40°C to +85°C) and long-term production continuity.

Supply support for ADS901E includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of expertise in high-performance data converters.

The ADS901E belongs to TI's high-speed pipeline ADC product line, designed specifically for demanding imaging, video, and communications applications where 10-bit resolution, 20 MSPS throughput, and low-power operation are jointly required.

FAQ

What is the absolute maximum input voltage range for the ADS901E analog input pin?

The ADS901E analog input (Pin 27) has an absolute maximum rating of +VS +0.3 V. With +VS = +3V, the maximum allowable analog input voltage is +3.3 V. However, the specified full-scale input range is strictly 1 V_p-p (e.g., +1 V to +2 V), and operation outside this range risks nonlinearity or damage. The device does not support rail-to-rail input swing.

How does the ADS901E handle power-down mode, and what happens to the digital outputs?

When Pwrdn (Pin 17) is driven high, the ADS901E enters power-down mode, reducing supply current from 16 mA to ~5 mA and total power dissipation from 49 mW to 15 mW. During this state, the digital outputs (Pins 3–12) are placed in high-impedance (3-state) mode. Valid data resumes five clock cycles after Pwrdn is returned low.

Can the ADS901E operate with a single +3V supply for both analog and digital sections?

Yes-the ADS901E operates from a single +3V analog supply (+VS on Pins 1/18/28), while its digital outputs are powered separately by LVDD (Pin 2). LVDD may be tied to the same +3V rail, but TI recommends doing so only if digital noise is tightly controlled; otherwise, a clean, filtered +3V source for LVDD improves SNR by isolating logic switching noise from the analog core.

What is the purpose of the CM (common-mode) output pin on the ADS901E?

The CM pin (Pin 26) provides a buffered output of the internal common-mode voltage VCM = (REFT + REFB)/2. It serves two key roles: (1) as a stable bias reference for AC-coupled input drivers (e.g., OPA680), and (2) as a diagnostic node to verify correct reference ladder operation. It is not intended as a power rail or load-driving output.

Does the ADS901E require external decoupling capacitors, and where should they be placed?

Yes-the ADS901E requires 0.1 µF ceramic decoupling capacitors placed as close as possible to each +VS pin (Pins 1, 18, 28) and to the LVDD pin (Pin 2). These capacitors suppress high-frequency transients generated by the pipeline architecture and maintain low supply impedance across 10 MHz–500 MHz. TI's recommended layout places them within 2 mm of each supply pin with short, wide traces to ground.