Analog Devices Inc. ADSP-21062LKB-160

Overview

ADSP-21062LKB-160 from Analog Devices is a 32-bit floating-point SHARC® digital signal processor with 2 Mbit dual-ported on-chip SRAM, 40 MHz instruction rate (25 ns cycle), and integrated I/O peripherals including six link ports, two serial ports, host interface, and DMA controller. It operates at 3.3 V and targets real-time audio processing, radar signal conditioning, and medical imaging systems requiring deterministic low-latency computation.

For engineers reviewing the ADSP-21062LKB-160 datasheet, ADSP-21062LKB-160 pinout, ADSP-21062LKB-160 application, or ADSP-21062LKB-160 equivalent, key selection criteria include its 3.3 V operation, 2 Mbit on-chip SRAM configuration, 240-ball PBGA package, IEEE 754 32-bit/40-bit floating-point support, and glueless multiprocessing capability via link and parallel bus interfaces.

Technical Context

The ADSP-21062LKB-160 implements the Super Harvard Architecture with four independent buses enabling simultaneous instruction fetch, dual data operand fetch, and nonintrusive I/O. Its core integrates parallel ALU, multiplier, and shifter units executing single-cycle IEEE-compliant floating-point operations.

It features dual data address generators with hardware circular buffer support, zero-overhead looping, and an on-chip instruction cache that enables three-bus operation-critical for sustained FFT and FIR filter performance. The 240 MBps link port throughput and distributed bus arbitration support scalable multiprocessor topologies without external glue logic.

Key Specifications

Pinout & Package

ADSP-21062LKB-160 is packaged in a 225-ball plastic ball grid array (PBGA) with 1.27 mm pitch, RoHS compliant, thermally enhanced for high-power DSP operation. Ball map follows JEDEC MO-205AC standard.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar floating-point DSP applications.

Compared with ADSP-21062LKB-160, ADSP-21062LBB-160 offers identical electrical and functional behavior in a different package, whereas ADSP-21065LKBZ-210 delivers significantly higher throughput but mandates new schematic and layout - making the former a drop-in alternative and the latter a generational upgrade path.

Availability

ADSP-21062LKB-160 is available at Aetrix Electronics and suitable for professional audio equipment, radar signal processors, medical ultrasound systems, and industrial motor controllers requiring stable component supply across extended production lifecycles.

Supply support for ADSP-21062LKB-160 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global semiconductor company specializing in high-performance analog, mixed-signal, and digital signal processing technologies for precision instrumentation, communications, and industrial applications.

The SHARC® processor family, including ADSP-21062LKB-160, was designed for computationally intensive real-time signal processing tasks demanding IEEE-compliant floating-point accuracy, deterministic timing, and integrated multiprocessing scalability.

FAQ

What is the operating voltage range specified for ADSP-21062LKB-160?

The ADSP-21062LKB-160 is a 3.3 V device with absolute maximum ratings of 3.6 V and minimum operating voltage of 3.0 V. Per Analog Devices Rev. H datasheet Section "ADSP-21060L/ADSP-21062L Specifications", it requires a regulated 3.3 V ± 0.3 V supply for core logic, and separate 3.3 V I/O supply. This distinguishes it from the 5 V ADSP-21062 variants and confirms its placement in the L-series low-voltage family. ADSP-21062LKB-160 must not be operated at 5 V.

Does ADSP-21062LKB-160 support IEEE 754 single-precision floating-point arithmetic?

Yes, ADSP-21062LKB-160 natively supports 32-bit IEEE 754 single-precision floating-point format, along with 40-bit extended-precision and 32-bit fixed-point formats. Its ALU, multiplier, and shifter units execute all three formats in hardware with single-cycle latency. Benchmarks in the datasheet confirm 80 MFLOPS sustained performance using IEEE 754-compliant operations. ADSP-21062LKB-160's floating-point unit is fully compliant and does not require software emulation.

What package type is used for ADSP-21062LKB-160 and how many interconnects does it have?

ADSP-21062LKB-160 uses a 225-ball plastic ball grid array (PBGA) package with 1.27 mm pitch, as confirmed in the "Package" row of Table 1 (Rev. H, Page 3) and the "225-Ball PBGA Ball Configuration" section (Page 52). It contains 225 solder balls arranged in a 15 × 15 array, including power, ground, I/O, and JTAG signals. This differs from the MQFP_PQ4 and CQFP packages offered for other members of the ADSP-2106x family. ADSP-21062LKB-160 is not available in leaded packages.

Can ADSP-21062LKB-160 directly interface with a 16-bit microprocessor host?

Yes, ADSP-21062LKB-160 supports asynchronous 16-bit host processor interfacing via its memory-mapped host port. Signals HBR, HBG, and REDY implement handshaking, and the external port handles 16-bit data packing/unpacking. Four DMA channels are allocated for host transfers, enabling low-overhead code/data loading. This capability is documented in the "Host Processor Interface" section (Page 5) and confirmed for all ADSP-21062L variants. ADSP-21062LKB-160 does not require external glue logic for 16-bit host connection.

How many link ports does ADSP-21062LKB-160 provide and what is their maximum aggregate bandwidth?

ADSP-21062LKB-160 provides six independent 4-bit link ports, each capable of double-data-rate operation (two 4-bit transfers per core cycle), yielding 8 bits/cycle per port. At 40 MHz core clock, this delivers 240 MBps aggregate bandwidth across all six ports - explicitly stated in the "Link Ports" section (Page 8) and verified in Figure 4's memory map description. This bandwidth is usable for point-to-point interprocessor communication in multiprocessing systems. ADSP-21062LKB-160's link ports are not shared with serial or external port functions.