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Home > Products > Integrated Circuits (ICs) > Embedded > DSP (Digital Signal Processors)

Analog Devices Inc. ADSP-21368KBPZ-2A

Name: ADSP-21368KBPZ-2A
Brand: Analog Devices Inc.
SKU: ADSP-21368KBPZ-2A
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: ADSP-21368KBPZ-2A

Manufacturer:: Analog Devices Inc.

Category:: DSP (Digital Signal Processors)

Package:: 256-LBGA Exposed Pad

Datasheet:: ADSP-21368KBPZ-2A.pdf

Description:: IC DSP 32BIT 333MHZ 256-BGA

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Product details

Overview

ADSP-21368KBPZ-2A from Analog Devices is a 32-bit/40-bit floating-point SHARC® DSP optimized for high-fidelity automotive and professional audio processing, featuring 400 MHz core instruction rate, 2 Mbits of on-chip SRAM, 6 Mbits of mask-programmable ROM, and integrated S/PDIF transceiver with four asynchronous sample rate converters (ASRC). It executes 2.4 GFLOPS in SIMD mode and supports real-time audio routing via the Digital Applications Interface (DAI).

For engineers reviewing the ADSP-21368KBPZ-2A datasheet, ADSP-21368KBPZ-2A pinout, ADSP-21368KBPZ-2A application, or ADSP-21368KBPZ-2A equivalent, key selection criteria include audiocentric peripheral integration (S/PDIF, ASRC, PCG), SIMD computational throughput, ROM-based security with 64-bit JTAG key, and BGA_ED package compatibility for high-density audio signal processing systems.

Technical Context

The ADSP-21368KBPZ-2A implements a dual-processing-element SIMD core (PEx/PEy), each with ALU, multiplier, shifter, and 40-bit register file, enabling parallel execution of identical instructions on independent data streams. Its enhanced Harvard architecture supports simultaneous 64-bit PM and DM bus transfers plus instruction cache fetch - all in one cycle.

Peripherals are partitioned into two clock domains: core domain (timer, JTAG, memory buses) and I/O processor domain (DAI, DPI, S/PDIF, ASRC, PWM, UART, SPI, TWI). The DAI includes flexible signal routing (SRU), eight serial ports (SPORTs), four precision clock generators (PCG), and an input data port (IDP) configurable as 8×I2S or 7×I2S + 20-bit parallel acquisition.

Key Specifications

Parameter	Value and Actual Design Meaning
Core Frequency	400 MHz - enables 2.5 ns instruction cycle time and 2.4 GFLOPS peak performance in SIMD mode.
On-Chip Memory	2 Mbits SRAM + 6 Mbits mask-ROM - supports boot-from-ROM security and eliminates external code storage for certified audio firmware.
S/PDIF Interface	Integrated transceiver with biphase encoding - handles consumer/professional digital audio I/O without external PHY or glue logic.
ASRC Channels	4 independent asynchronous sample rate converters - enables real-time mixing of audio streams at different sampling rates (e.g., 44.1 kHz + 48 kHz) with 128 dB SNR.
Serial Ports	8 SPORTs - support up to 32 I2S channels or 8×TDM frames (128 channels/frame), ideal for multi-microphone array or multi-zone amplifier control.
PWM Outputs	16 outputs grouped in 4×4 sets - configurable for center-aligned or edge-aligned waveforms with double-update mode to reduce harmonic distortion in Class-D audio amplifiers.
Package	256-ball BGA_ED (17 mm × 17 mm, 1.0 mm pitch) - provides high I/O density and thermal performance for compact audio processing modules.

Pinout & Package

ADSP-21368KBPZ-2A is housed in a 256-ball BGA_ED package (17 mm × 17 mm, 1.0 mm ball pitch) with exposed thermal pad. Pinout follows Analog Devices' standard SHARC-2136x BGA layout per Rev. H datasheet Figure 27 (256-Ball BGA_ED Pinout, Page 53), supporting full peripheral access including DAI, DPI, SDRAM, AMI, JTAG, and power/ground distribution optimized for low-noise audio PCB design.

Pin/Terminal	Circuit Role	Design Meaning
VDD_CORE (Balls A1–A4, B1–B4, etc.)	Digital core supply	1.2 V ±3% supply for 400 MHz operation; requires low-ESR decoupling near each group of balls.
VDD_IO (Balls C1–C4, D1–D4, etc.)	I/O bank supply	3.3 V supply for DAI, DPI, SDRAM, and external port interfaces; supports mixed-voltage signaling.
DAI_P00–DAI_P23	Digital Applications Interface pins	Configurable I/O for S/PDIF, SPORT, PCG, IDP, and ASRC signals - routed via SRU for software-defined audio interconnect.
SDRAM_A0–A12, DQ0–DQ31	SDRAM interface bus	32-bit data + 13-bit address bus for glueless connection to industry-standard SDRAM (up to 64M words/bank).
JTAG_TCK/TMS/TDI/TDO/TRST	JTAG test access port	Supports boundary scan, emulation, and secure debug only after valid 64-bit key authentication.
CLKIN / CLKOUT	Reference clock interface	Accepts 1–50 MHz crystal or oscillator input; CLKOUT drives external clocks for codecs or ADCs via PCG-derived outputs.

Key Features

Feature	Design Value
ROM-Based Security	Prevents unauthorized readout of internal firmware and disables JTAG access unless authenticated with customer-specific 64-bit key - essential for OEM audio IP protection.
Digital Applications Interface (DAI)	Software-configurable signal routing (SRU) connects 8 SPORTs, S/PDIF, 4 PCGs, 4 ASRCs, and IDP without hardware redesign - accelerates audio subsystem prototyping.
Asynchronous Sample Rate Conversion	Four independent ASRC blocks with 128 dB dynamic range enable jitter-free mixing of asynchronous audio sources (e.g., Bluetooth + USB + analog ADC) in real time.
SIMD Computational Architecture	Dual PEx/PEy processing elements execute identical instructions on separate data paths - doubles throughput for FIR/IIR filters, FFTs, and matrix operations common in beamforming and room correction.
Precision Clock Generators (PCG)	Eight total PCG outputs (4 in DAI, 2 in DPI) generate jitter-free audio clocks (e.g., 44.1 kHz, 48 kHz, 96 kHz, 192 kHz) with programmable dividers - eliminates need for external clock synthesizers.

Applications

Automotive Infotainment Head Unit	Professional Digital Mixing Console
Use Scenario: Real-time audio processing in vehicle head units with multiple input sources (Bluetooth, USB, tuner, mic), multi-zone output, and active noise cancellation. IC Role / Device Role / Timing Role: Primary audio DSP handling SRC, EQ, dynamics processing, and speaker management with deterministic latency under 500 µs. Use Value: Integrated ASRC and DAI eliminate external clock domain translators and reduce BOM count by 3–5 components per audio path.	Use Scenario: High-channel-count digital mixer supporting >64 inputs/outputs, real-time effects, and recallable channel strips with sample-accurate synchronization. IC Role / Device Role / Timing Role: Central processing engine executing FIR-based linear-phase EQ, convolution reverb, and multiband compression across 32+ channels simultaneously. Use Value: 2.4 GFLOPS SIMD performance and 2 Mbits on-chip SRAM enable >100 ms of delay line storage and 128-tap FIR filtering per channel without external memory bottlenecks.
High-End Home Theater AV Receiver	Studio Audio Interface with Hardware DSP
Use Scenario: 11.2-channel AV receiver performing object-based audio decoding (Dolby Atmos, DTS:X), room correction, and speaker calibration. IC Role / Device Role / Timing Role: Dedicated SHARC coprocessor offloading computationally intensive tasks (e.g., 32-channel binaural rendering, parametric EQ, bass management) from main SoC. Use Value: Mask-ROM boot ensures deterministic startup timing and prevents firmware tampering - critical for certified audio decoding pipelines.	Use Scenario: Thunderbolt/USB audio interface with onboard DSP for zero-latency monitoring, hardware-accelerated effects, and FPGA-coordinated I/O routing. IC Role / Device Role / Timing Role: Low-latency audio co-processor interfacing directly with ADC/DAC via SPORTs and IDP, synchronized to host clock via PCG-derived reference. Use Value: 16 PWM outputs drive LED metering and relay-based input switching; S/PDIF transceiver enables direct digital loopback testing without external converters.

Automotive Infotainment Head Unit

Professional Digital Mixing Console

Use Scenario: Real-time audio processing in vehicle head units with multiple input sources (Bluetooth, USB, tuner, mic), multi-zone output, and active noise cancellation.

IC Role / Device Role / Timing Role: Primary audio DSP handling SRC, EQ, dynamics processing, and speaker management with deterministic latency under 500 µs.

Use Value: Integrated ASRC and DAI eliminate external clock domain translators and reduce BOM count by 3–5 components per audio path.

Use Scenario: High-channel-count digital mixer supporting >64 inputs/outputs, real-time effects, and recallable channel strips with sample-accurate synchronization.

IC Role / Device Role / Timing Role: Central processing engine executing FIR-based linear-phase EQ, convolution reverb, and multiband compression across 32+ channels simultaneously.

Use Value: 2.4 GFLOPS SIMD performance and 2 Mbits on-chip SRAM enable >100 ms of delay line storage and 128-tap FIR filtering per channel without external memory bottlenecks.

High-End Home Theater AV Receiver

Studio Audio Interface with Hardware DSP

Use Scenario: 11.2-channel AV receiver performing object-based audio decoding (Dolby Atmos, DTS:X), room correction, and speaker calibration.

IC Role / Device Role / Timing Role: Dedicated SHARC coprocessor offloading computationally intensive tasks (e.g., 32-channel binaural rendering, parametric EQ, bass management) from main SoC.

Use Value: Mask-ROM boot ensures deterministic startup timing and prevents firmware tampering - critical for certified audio decoding pipelines.

Use Scenario: Thunderbolt/USB audio interface with onboard DSP for zero-latency monitoring, hardware-accelerated effects, and FPGA-coordinated I/O routing.

IC Role / Device Role / Timing Role: Low-latency audio co-processor interfacing directly with ADC/DAC via SPORTs and IDP, synchronized to host clock via PCG-derived reference.

Use Value: 16 PWM outputs drive LED metering and relay-based input switching; S/PDIF transceiver enables direct digital loopback testing without external converters.

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-performance audio DSP applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
ADSP-21369KBPZ-2A	Same pinout, identical peripherals, but adds shared memory interface for multiprocessor systems and extended SDRAM timing flexibility.	Preferred for scalable multi-DSP audio systems requiring inter-processor arbitration and shared external memory.	Select when building multi-core SHARC systems with distributed processing load across ≥2 ADSP-2136x devices.
ADSP-21364KBPZ-2A	Lacks S/PDIF transceiver, ASRC, and IDP; reduced ROM (4 Mbits); same 400 MHz core and SIMD architecture.	Suitable for cost-sensitive audio control applications where external SRC or codec I/O suffices.	Choose for non-S/PDIF audio control (e.g., motorized potentiometer control, basic EQ) where BOM cost reduction outweighs integrated audio I/O.

Compared with ADSP-21369KBPZ-2A, the ADSP-21368KBPZ-2A omits shared memory support but retains identical audio-centric peripherals and performance; versus ADSP-21364KBPZ-2A, it adds full S/PDIF/ASRC/IDP capability at no clock or memory bandwidth penalty - making it the optimal balance for standalone high-fidelity audio DSP nodes.

Availability

ADSP-21368KBPZ-2A is available at Aetrix Electronics and suitable for automotive infotainment, professional audio mixing consoles, high-end home theater receivers, and studio-grade audio interfaces requiring stable component supply and long-term lifecycle assurance.

Supply support for ADSP-21368KBPZ-2A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and DSP technology, headquartered in Norwood, MA, with decades of expertise in precision signal processing and audio IC design.

The ADSP-21368KBPZ-2A belongs to the SHARC® family - engineered specifically for computationally intensive, low-latency audio signal processing in automotive, pro-audio, and broadcast environments where floating-point precision and peripheral integration are critical.

FAQ

What is the maximum operating frequency of the ADSP-21368KBPZ-2A?

The ADSP-21368KBPZ-2A operates at a guaranteed maximum core instruction rate of 400 MHz, corresponding to a 2.5 ns instruction cycle time. This frequency is fully supported across the commercial temperature range (0°C to +70°C) and enables 2.4 GFLOPS peak performance in SIMD mode. All timing specifications in the Rev. H datasheet assume operation at this rated frequency.

Does the ADSP-21368KBPZ-2A support booting from internal ROM?

Yes, the ADSP-21368KBPZ-2A supports secure boot-from-ROM using its 6 Mbits of mask-programmable ROM. When enabled, the device executes exclusively from internal ROM and disables external boot modes and unrestricted JTAG access - requiring a valid 64-bit authentication key for debug access. This feature is used to protect proprietary audio algorithms and ensure deterministic startup behavior.

How many asynchronous sample rate converters (ASRC) does the ADSP-21368KBPZ-2A include?

The ADSP-21368KBPZ-2A integrates four independent asynchronous sample rate converters (ASRC), each capable of converting between arbitrary input and output sampling rates with 128 dB dynamic range. These ASRCs are accessible via the Digital Applications Interface (DAI) and support real-time mixing of asynchronous audio streams such as Bluetooth (44.1 kHz) and USB audio (48 kHz) without external hardware.

Is the ADSP-21368KBPZ-2A pin-compatible with other SHARC processors?

The ADSP-21368KBPZ-2A shares the same 256-ball BGA_ED package footprint and pinout with ADSP-21369KBPZ-2A, enabling direct PCB compatibility between the two models. However, it is not pin-compatible with ADSP-21364KBPZ-2A (which uses 208-lead LQFP_EP) or earlier SHARC generations due to differences in peripheral mapping, power pin allocation, and ball assignment for DAI/DPI signals.

What development tools are supported for the ADSP-21368KBPZ-2A?

Analog Devices provides full toolchain support for the ADSP-21368KBPZ-2A, including CrossCore Embedded Studio IDE, SHARC EZ-KIT Lite evaluation boards (e.g., EZ-KIT 21369), VisualDSP++ legacy compatibility, and libraries for audio processing (SigmaStudio integration, SRC, FIR/IIR, FFT). Hardware debugging requires an ICE-1000 or ICE-2000 emulator compatible with JTAG and SWD interfaces.

ADSP-21368KBPZ-2A Specifications

Product attributes: Attribute value

Manufacturer:: Analog Devices Inc.

Series:: SHARC®

Package/Case:: 256-LBGA Exposed Pad

Packaging:: Tray

Product Status:: Obsolete

Type:: Floating Point

Interface:: DAI, DPI

Clock Rate:: 333MHz

Non-Volatile Memory:: ROM (768kB)

On-Chip RAM:: 256kB

Voltage - I/O:: 3.30V

Voltage - Core:: 1.20V

Operating Temperature:: 0°C ~ 70°C (TA)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 256-BGA-ED (27x27)

ADSP-21368KBPZ-2A FAQ

1.How can I place an order for ADSP-21368KBPZ-2A through Aetrix?

Please submit a Request for Quotation (RFQ) for ADSP-21368KBPZ-2A on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ADSP-21368KBPZ-2A reliable?

The price and inventory of ADSP-21368KBPZ-2A are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADSP-21368KBPZ-2A is usually 5 days.

3.What payment methods are accepted for ADSP-21368KBPZ-2A?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADSP-21368KBPZ-2A transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ADSP-21368KBPZ-2A?

ADSP-21368KBPZ-2A orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ADSP-21368KBPZ-2A order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ADSP-21368KBPZ-2A?

For technical support, including ADSP-21368KBPZ-2A datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADSP-21368KBPZ-2A requirements.

6.How does Aetrix verify that ADSP-21368KBPZ-2A is sourced from the original manufacturer or authorized distributors?

All ADSP-21368KBPZ-2A products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADSP-21368KBPZ-2A meets industry standards.

7.What is the process for return or replacement of ADSP-21368KBPZ-2A?

All ADSP-21368KBPZ-2A units undergo pre-shipment inspection (PSI). If there is an issue with ADSP-21368KBPZ-2A, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ADSP-21368KBPZ-2A part is unused and in its original packaging.

Return procedure for ADSP-21368KBPZ-2A:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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