Analog Devices Inc. ADSP-21573KBCZ-4

Overview

ADSP-21573KBCZ-4 from Analog Devices is a dual-core SHARC+ DSP with integrated Arm Cortex-A5 processor, delivering 500 MHz per SHARC+ core and 500 MHz Arm Cortex-A5 operation. It features 3 Mb L1 SRAM per SHARC+ core (with parity), 256 kB L2 cache (with parity), and supports 32-/40-/64-bit floating-point arithmetic. Designed for automotive audio processing, it integrates dual CAN 2.0 controllers, 8-channel 12-bit HADC, and AEC-Q100 qualification.

For engineers reviewing the ADSP-21573KBCZ-4 datasheet, ADSP-21573KBCZ-4 pinout, ADSP-21573KBCZ-4 application, or ADSP-21573KBCZ-4 equivalent, key selection criteria include dual SHARC+ core clock speed, L1 SRAM configuration options, Arm TrustZone security support, DDR3L/DDR2/LPDDR1 interface capability, and 400-ball CSP_BGA package compatibility with automotive thermal requirements.

Technical Context

The ADSP-21573KBCZ-4 implements a heterogeneous dual-domain architecture: two SHARC+ SIMD cores operate at up to 500 MHz each with independent 384 kB L1 SRAM banks (configurable as SRAM or cache), while the Arm Cortex-A5 core runs at 500 MHz with 32 kB I-cache, 32 kB D-cache, and 256 kB L2 cache - all with parity protection. The system fabric interconnects these domains via requester/completer ports and a shared L2 SRAM (1 MB with ECC).

Peripherals are routed through a Signal Routing Unit (SRU) and managed by a System Control Unit supporting fault management, thermal monitoring (TMU), and security enforcement via ARM TrustZone, cryptographic accelerators, and OTP memory. The device supports deterministic real-time signal processing via ASRCs, SPORTs, S/PDIF, and hardware FIR/IIR offload engines - all synchronized under a dual-precision clock generation unit (CGU) with two precision clock generators.

Key Specifications

Pinout & Package

ADSP-21573KBCZ-4 uses a 400-ball CSP_BGA package (17 mm × 17 mm, 0.65 mm pitch), RoHS compliant and qualified for automotive temperature range. Ball assignments follow JEDEC MO-220 standard with defined power, ground, I/O, and differential clock ball groups.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-core DSP + application processor applications.

Compared with ADSP-21573KBCZ-4, ADSP-21573KBCZ-5 provides identical functionality with enhanced voltage robustness, while ADSP-SC573KBCZ-4 extends connectivity with Ethernet AVB - making the latter preferable for time-synchronized distributed audio, and the former optimal for cost-sensitive, non-networked automotive audio nodes.

Availability

ADSP-21573KBCZ-4 is available at Aetrix Electronics and suitable for automotive infotainment, professional audio equipment, and industrial acoustic monitoring systems requiring stable component supply across extended product lifecycles.

Supply support for ADSP-21573KBCZ-4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global semiconductor leader specializing in high-performance analog, mixed-signal, and digital signal processing technologies for precision sensing, power management, and real-time signal analysis.

The ADSP-21573KBCZ-4 belongs to the SHARC+ dual-core DSP family designed specifically for deterministic, low-latency audio and sensor processing in automotive and industrial environments where functional safety and computational density are critical.

FAQ

What is the maximum operating frequency of each SHARC+ core in the ADSP-21573KBCZ-4?

The ADSP-21573KBCZ-4 supports up to 500 MHz per SHARC+ core under specified voltage and temperature conditions. This frequency is guaranteed per the datasheet's operating conditions table (Rev. C, Page 56), and enables sustained 6 GFLOPS performance per core for real-time audio and mathematical workloads.

Does the ADSP-21573KBCZ-4 include an integrated DDR memory controller?

No, the ADSP-21573KBCZ-4 does not integrate a DDR controller. Unlike the ADSP-SC573 variant, the ADSP-21573KBCZ-4 omits the DDR3L/DDR2/LPDDR1 interface - confirmed in Table 2 (Rev. C, Page 4) where "DDR3/DDR2/LPDDR1 Controller" is marked "N/A" for ADSP-21573. External memory expansion relies on SPI flash or SDIO/eMMC.

How many hardware accelerators are integrated into the ADSP-21573KBCZ-4?

The ADSP-21573KBCZ-4 integrates two dedicated hardware accelerators: FIR offload engine and IIR offload engine. Both are documented in the "Additional Features" section (Rev. C, Page 1) and reduce SHARC+ core load for repetitive filter computations - verified in Figure 1 block diagram and Table 1 feature listing.

Is the ADSP-21573KBCZ-4 pin-compatible with the ADSP-SC573KBCZ-4?

Yes, the ADSP-21573KBCZ-4 is pin-compatible with the ADSP-SC573KBCZ-4 - both use the identical 400-ball CSP_BGA package with matching ball assignments (Rev. C, Pages 127–133). However, functional differences exist: ADSP-SC573KBCZ-4 includes DDR and EMAC peripherals absent in ADSP-21573KBCZ-4.

What boot sources are supported by the ADSP-21573KBCZ-4?

The ADSP-21573KBCZ-4 supports boot from SPI flash, quad-SPI flash, SDIO/eMMC, and parallel NOR flash - determined by BOOT_CFG[3:0] strap pins at power-up (Rev. C, Page 45). Internal L2 ROM provides fallback boot loader if external media fails, ensuring field-recoverable firmware updates.