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Analog Devices Inc. ADSP-21587KBCZ-4B
- Part No.:
- ADSP-21587KBCZ-4B
- Manufacturer:
- Analog Devices Inc.
- Category:
- DSP (Digital Signal Processors)
- Package:
- 529-LFBGA, CSPBGA
- Datasheet:
-
ADSP-21587KBCZ-4B.pdf
- Description:
- 2XSHARC DUALDDR,HPCP
- Quantity:
- Payment:
- Shipping:
Inventory:3,590
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Product details
Overview
ADSP-21587KBCZ-4B from Analog Devices is a dual-core SHARC+ DSP with integrated Arm Cortex-A5 processor, delivering 500 MHz per SHARC+ core and 500 MHz Arm Cortex-A5 operation. It features 5 Mb L1 SRAM per SHARC+ core (with parity), 256 kB L2 cache, 256 kB ECC-protected L2 SRAM, and supports 32-/40-/64-bit floating-point arithmetic. It targets high-performance automotive audio processing, real-time control, and safety-critical signal processing systems.
For engineers reviewing the ADSP-21587KBCZ-4B datasheet, ADSP-21587KBCZ-4B pinout, ADSP-21587KBCZ-4B application, or ADSP-21587KBCZ-4B equivalent, key selection considerations include dual-core SHARC+ clock speed, Arm Cortex-A5 integration, L1/L2 memory configuration, AEC-Q100 qualification, and 529-ball CSP_BGA package compatibility.
Technical Context
The ADSP-21587KBCZ-4B implements a heterogeneous dual-processor architecture: two SHARC+ cores operating at up to 500 MHz each, plus a 500 MHz Arm Cortex-A5 core with NEON/VFPv4-D16 and TrustZone security extensions. Its system infrastructure includes a shared 256 kB L2 SRAM with ECC, 512 kB L2 ROM, and dual 16-bit DDR3/DDR2/LPDDR1 interfaces.
It integrates dedicated hardware accelerators including a pipelined FFT/IFFT engine, FIR/IIR offload units, harmonic analysis engine (HAE), SINC filter, and cryptographic acceleration blocks. The device supports AEC-Q100 Grade 2 automotive qualification and includes on-chip safety features such as dual CRC, watchdog timers, thermal monitoring unit (TMU), and system protection unit (SPU).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | Dual SHARC+ cores + Arm Cortex-A5, enabling parallel real-time DSP and application-level OS tasks |
| SHARC+ Core Speed | 500 MHz - enables ≥2000 MFLOPS per core for demanding audio and control algorithms |
| L1 Memory per SHARC+ | 5 Mb (640 kB) SRAM with parity - provides zero-wait-state access for time-critical code/data |
| L2 Cache | 256 kB with parity - improves Arm Cortex-A5 instruction/data throughput and coherency |
| Memory Interfaces | Dual 16-bit DDR3/DDR2/LPDDR1 controllers - supports up to 2 independent external memory channels |
| Automotive Qualification | AEC-Q100 Grade 2 (−40°C to +105°C) - validated for under-hood and infotainment ECU use |
| Package | 529-ball CSP_BGA, 19 mm × 19 mm, 0.8 mm pitch - enables high I/O count in compact automotive PCB layouts |
| Security Features | Arm TrustZone, cryptographic accelerators, fast secure boot with IP protection - meets ISO 21434 threat mitigation requirements |
Pinout & Package
ADSP-21587KBCZ-4B uses a 19 mm × 19 mm, 529-ball CSP_BGA package (RoHS compliant) with 0.8 mm ball pitch. Pin assignments are defined in Analog Devices' ADSP-SC58x/ADSP-2158x 529-Ball BGA Ball Assignments documentation (Rev. C, pp. 163–169). The package supports full GPIO multiplexing across Ports A–G (102 + 40 GPIO + DAI pins), dual CAN2.0, PCIe 2.0 (1 lane), dual USB 2.0 HS, dual EMAC, and 8-channel 12-bit HADC.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD_INT | Core power supply | 1.0 V ±3% supply for SHARC+ and Arm cores; requires low-noise regulation and local decoupling |
| VDD_IO | I/O power supply | 1.8 V/3.3 V selectable supply for interface pins; supports mixed-voltage peripheral interfacing |
| CLKIN | Reference clock input | Accepts 1–50 MHz crystal or LVCMOS clock; feeds internal CGU for all domain clocks |
| RESET_B | Active-low reset input | Synchronous deassertion required; initiates full cold boot sequence with secure boot verification |
| JTAG_TCK/TMS/TDI/TDO | Debug interface | IEEE 1149.1-compliant boundary scan and CoreSight debug access to both SHARC+ and Arm cores |
| DDR_DQ[15:0] | DDR data bus | 16-bit bidirectional data interface supporting DDR3L (1.35 V), DDR2, or LPDDR1 SDRAM |
| CAN0_TX/CAN0_RX | CAN2.0 controller interface | Differential signaling pair for CAN FD-capable communication; integrated transceiver not included |
Key Features
| Feature | Design Value |
|---|---|
| Dual SHARC+ + Arm Cortex-A5 heterogeneity | Enables concurrent real-time DSP (e.g., active noise cancellation) and Linux-based application layer (e.g., UI, connectivity) |
| Hardware-accelerated FFT/IFFT engine | Reduces 1024-point FFT execution time to <1.5 μs, freeing SHARC+ cycles for control loops |
| Integrated SINC filter and HADC | Direct sigma-delta ADC interface with programmable oversampling ratio (OSR) for motor current sensing |
| Arm TrustZone + cryptographic accelerators | Enables secure boot, encrypted firmware storage, and isolated secure world execution for OTA updates |
| AEC-Q100 Grade 2 qualification | Validated for continuous operation at 105°C ambient, meeting automotive powertrain and ADAS environmental requirements |
| Two independent L3 memory interfaces | Allows simultaneous DDR3 access by SHARC+ and Arm subsystems without arbitration latency |
Applications
| Automotive Infotainment Head Unit | Electric Powertrain Control Unit |
|---|---|
Use Scenario: Real-time audio processing, voice recognition, and display rendering in vehicle head units. IC Role / Device Role / Timing Role: ADSP-21587KBCZ-4B serves as the primary multimedia SoC - SHARC+ cores handle multi-channel ASRC, S/PDIF routing, and Dolby decoding; Arm core runs Android Automotive OS. Use Value: Dual L3 memory interfaces prevent audio buffer underruns during GUI rendering; integrated DAI and PCGs eliminate external clock generators. |
Use Scenario: Closed-loop motor control, battery management, and torque vectoring in EV inverters. IC Role / Device Role / Timing Role: ADSP-21587KBCZ-4B acts as deterministic real-time controller - SHARC+ cores execute FOC algorithms at 20 kHz PWM rate; Arm core handles CAN FD diagnostics and thermal modeling. Use Value: On-chip HADC with SINC filter enables direct connection to current-sense sigma-delta modulators; TMU triggers safe shutdown at 125°C junction. |
| Professional Audio Digital Mixer | Industrial Predictive Maintenance Edge Node |
Use Scenario: Low-latency digital mixing, effects processing, and networked audio transport in live sound systems. IC Role / Device Role / Timing Role: ADSP-21587KBCZ-4B functions as audio signal processor - SHARC+ cores manage 128-channel mixing, reverb, and AES67 streaming; Arm core handles AVB stack and web UI. Use Value: Full SPORT and S/PDIF interfaces support 32-channel I/O without glue logic; 5 Mb L1 SRAM ensures sub-50 μs interrupt latency for sample-accurate processing. |
Use Scenario: Vibration analysis, spectral anomaly detection, and wireless telemetry in factory automation equipment. IC Role / Device Role / Timing Role: ADSP-21587KBCZ-4B operates as edge AI inference node - SHARC+ cores perform real-time FFT and envelope detection; Arm core runs lightweight TensorFlow Lite Micro model. Use Value: Hardware FFT engine achieves 10× speedup over software implementation; cryptographic accelerators enable signed firmware updates over BLE. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core DSP + application processor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADSP-SC589KBCZ-4 | Same 529-BGA package, identical SHARC+/Arm specs, but adds PCIe 2.0 (1 lane) and RTC; no HADC | Better suited for compute-intensive gateway applications requiring high-speed interconnect; lacks integrated analog front-end | Select when PCIe expansion (e.g., NVMe storage, FPGA co-processing) is required and external ADC is acceptable |
| ADSP-21584KBCZ-4 | 349-BGA package, same SHARC+/Arm speeds, 640 kB L1 SRAM/core, but only one DDR controller and no PCIe/USB/EMAC | Targeted at cost-sensitive, space-constrained audio endpoints (e.g., smart speaker DSP modules) | Select when footprint and BOM cost are critical, and system-level connectivity is handled externally |
Compared with ADSP-21587KBCZ-4B, ADSP-SC589KBCZ-4 adds PCIe but removes HADC, making it ideal for gateway roles, while ADSP-21584KBCZ-4 reduces I/O and memory bandwidth for compact audio-only designs - neither offers identical analog integration and dual DDR capability.
Availability
ADSP-21587KBCZ-4B is available at Aetrix Electronics and suitable for automotive infotainment, electric powertrain control, and professional audio systems requiring stable component supply, long-term lifecycle assurance, and AEC-Q100-compliant sourcing.
Supply support for ADSP-21587KBCZ-4B includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and DSP technology, headquartered in Wilmington, MA, with design centers worldwide and a 50+ year heritage in precision signal processing.
The ADSP-21587KBCZ-4B belongs to the SHARC+ dual-core DSP family designed specifically for safety-certifiable, high-fidelity audio and real-time control applications in automotive, industrial, and pro-audio markets.
FAQ
What is the maximum operating temperature range for the ADSP-21587KBCZ-4B?
The ADSP-21587KBCZ-4B is qualified to AEC-Q100 Grade 2, supporting continuous operation from −40°C to +105°C ambient temperature. This rating is verified across all functional blocks including SHARC+ cores, Arm Cortex-A5, memory subsystems, and peripherals. Thermal derating is not required within this range, and the on-chip TMU provides real-time junction temperature monitoring with programmable alarm thresholds.
Does the ADSP-21587KBCZ-4B support secure boot and firmware encryption?
Yes, the ADSP-21587KBCZ-4B supports fast secure boot with hardware-enforced IP protection and integrates cryptographic accelerators for AES-128/256, SHA-256, and RSA-2048. Boot code is authenticated using keys stored in OTP memory before execution, and TrustZone isolates secure world execution. Secure boot is mandatory for AEC-Q100-compliant automotive deployments and is enabled by default in production configurations of the ADSP-21587KBCZ-4B.
How many independent DDR memory channels does the ADSP-21587KBCZ-4B support?
The ADSP-21587KBCZ-4B supports two independent 16-bit DDR3/DDR2/LPDDR1 memory interfaces (dual L3 controllers), allowing simultaneous access by SHARC+ and Arm subsystems without arbitration contention. Each interface supports DDR3L (1.35 V), standard DDR3 (1.5 V), DDR2, or LPDDR1 devices. This dual-channel capability is confirmed in Table 2 of the Rev. C datasheet and is a distinguishing feature versus single-channel variants like ADSP-21584KBCZ-4.
Is the ADSP-21587KBCZ-4B pin-compatible with other ADSP-2158x family members?
No, the ADSP-21587KBCZ-4B uses a 529-ball CSP_BGA package, while ADSP-21583KBCZ-4B and ADSP-21584KBCZ-4B use 349-ball CSP_BGA packages. Ball maps, power domains, and peripheral pin allocations differ significantly between the two package families. Migration requires PCB redesign; however, software is binary-compatible across ADSP-2158x devices due to architectural consistency.
What development tools are officially supported for the ADSP-21587KBCZ-4B?
Analog Devices officially supports CrossCore Embedded Studio (CCES) v2.12+ for ADSP-21587KBCZ-4B, including SHARC+ and Arm Cortex-A5 debug, profiling, and build toolchains. The EZ-KIT evaluation board (ADZS-SC589-EZLITE) is hardware-compatible and supports JTAG/SWD debugging, while the SigmaStudio+ plugin enables graphical audio algorithm development targeting the ADSP-21587KBCZ-4B's DAI and accelerator blocks.
ADSP-21587KBCZ-4B Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- SHARC®
- Package/Case:
- 529-LFBGA, CSPBGA
- Packaging:
- Tray
- Product Status:
- Active
- Type:
- Floating Point
- Interface:
- CAN, EBI/EMI, Ethernet, DAI, I2C, MMC/SD/SDIO, SPI, SPORT, UART/USART, USB OTG
- Clock Rate:
- 450MHz
- Non-Volatile Memory:
- ROM (512kB)
- On-Chip RAM:
- 640kB
- Voltage - I/O:
- 3.30V
- Voltage - Core:
- 1.10V
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 529-CSPBGA (19x19)
ADSP-21587KBCZ-4B FAQ
1.How can I place an order for ADSP-21587KBCZ-4B through Aetrix?
Please submit a Request for Quotation (RFQ) for ADSP-21587KBCZ-4B on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADSP-21587KBCZ-4B reliable?
The price and inventory of ADSP-21587KBCZ-4B are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADSP-21587KBCZ-4B is usually 5 days.
3.What payment methods are accepted for ADSP-21587KBCZ-4B?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADSP-21587KBCZ-4B transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADSP-21587KBCZ-4B?
ADSP-21587KBCZ-4B orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADSP-21587KBCZ-4B order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADSP-21587KBCZ-4B?
For technical support, including ADSP-21587KBCZ-4B datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADSP-21587KBCZ-4B requirements.
6.How does Aetrix verify that ADSP-21587KBCZ-4B is sourced from the original manufacturer or authorized distributors?
All ADSP-21587KBCZ-4B products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADSP-21587KBCZ-4B meets industry standards.
7.What is the process for return or replacement of ADSP-21587KBCZ-4B?
All ADSP-21587KBCZ-4B units undergo pre-shipment inspection (PSI). If there is an issue with ADSP-21587KBCZ-4B, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADSP-21587KBCZ-4B part is unused and in its original packaging.
Return procedure for ADSP-21587KBCZ-4B:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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