Analog Devices Inc. ADSP-21594KBPZ10

Overview

ADSP-21594KBPZ10 from Analog Devices is a dual-core SHARC+ floating-point DSP with integrated Arm Cortex-A5 application processor, delivering up to 1 GHz per SHARC+ core and 1 GHz/1600 DMIPS for the Arm core. It features 2 × 640 kB L1 SRAM with parity, 2 MB shared L2 SRAM with ECC, dual CAN FD interfaces, and 135 GPIOs - deployed in automotive audio amplifiers, digital cockpits, and ANC/RNC systems.

For engineers reviewing the ADSP-21594KBPZ10 datasheet, ADSP-21594KBPZ10 pinout, ADSP-21594KBPZ10 application, or ADSP-21594KBPZ10 equivalent, key selection criteria include dual-core SHARC+ clock speed (1 GHz), Arm Cortex-A5 integration, HPC BGA package compatibility, DDR3L interface support, and AEC-Q100 qualification for automotive signal processing.

Technical Context

The ADSP-21594KBPZ10 implements a heterogeneous dual-domain architecture: two SHARC+ cores operate at up to 1 GHz each with 5 Mb total L1 SRAM (2 × 640 kB), supporting 32-/40-/64-bit floating-point and 32-bit fixed-point arithmetic; the Arm Cortex-A5 core runs at up to 1 GHz with 32 kB I/D caches and 256 kB L2 cache, enabling Linux-capable application-layer execution alongside real-time DSP tasks.

Its system infrastructure includes a shared 2 MB L2 SRAM with ECC, 16-bit DDR3/DDR3L controller, dual CAN FD controllers, 8 full SPORTs, 2× S/PDIF, 8× ASRCs, and hardware accelerators for FIR/IIR filtering (up to 1 GHz), all coordinated via a system crossbar and 8 MemDMAs - optimized for deterministic low-latency audio and control loop processing.

Key Specifications

Pinout & Package

ADSP-21594KBPZ10 uses a 400-ball BGA_ED package (17 mm × 17 mm, 0.8 mm pitch), RoHS compliant, with high-peripheral-count (HPC) ball assignment supporting 135 GPIOs, dual CAN FD, 2× EMAC, USB 2.0 HS OTG, and full digital audio I/O.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-core DSP + application processor applications.

Compared with ADSP-SC594KZPZ10 and ADSP-21593KBPZ10, the ADSP-21594KBPZ10 uniquely delivers full HPC peripheral integration *with* enabled Arm Cortex-A5 - enabling hybrid real-time DSP and application processing in a single AEC-Q100 qualified package, unlike the Arm-disabled SC594 or peripheral-limited 21593.

Availability

ADSP-21594KBPZ10 is available at Aetrix Electronics and suitable for automotive audio amplifiers, digital cockpit systems, and active noise control applications requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for ADSP-21594KBPZ10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and DSP technology, headquartered in Wilmington, MA, with deep expertise in signal processing, precision conversion, and automotive-grade IC design.

The ADSP-21594KBPZ10 belongs to the SHARC+ family - engineered specifically for high-fidelity, low-latency audio and real-time control applications in automotive, professional audio, and industrial systems where deterministic floating-point performance and functional safety coexist.

FAQ

What is the maximum operating frequency of the SHARC+ cores in the ADSP-21594KBPZ10?

The ADSP-21594KBPZ10 features two SHARC+ cores each capable of operating at up to 1 GHz. This speed is confirmed in the Rev. E datasheet Table 1 and General Description section, enabling sustained 32-/40-/64-bit floating-point throughput for demanding audio and control algorithms without throttling under thermal constraints.

Does the ADSP-21594KBPZ10 include an Arm Cortex-A5 core, and what is its clock speed?

Yes, the ADSP-21594KBPZ10 integrates a fully enabled Arm Cortex-A5 core running at up to 1 GHz with 32 kB L1 instruction and data caches and 256 kB L2 cache. Unlike the ADSP-SC594, the ADSP-21594KBPZ10's Arm core is functional and supported - verified in Table 1 and the "ARM Cortex-A5 Processor" section of the datasheet.

Is the ADSP-21594KBPZ10 AEC-Q100 qualified, and for which temperature grade?

Yes, the ADSP-21594KBPZ10 is AEC-Q100 qualified for Grade 2 (−40°C to +105°C), as explicitly stated in the "Applications" and "Automotive Products" sections of the Rev. E datasheet. This qualification covers the full HPC BGA package and applies to all integrated peripherals including CAN FD and USB 2.0 OTG.

What type of memory does the ADSP-21594KBPZ10 provide for the SHARC+ cores, and how is it configured?

The ADSP-21594KBPZ10 provides 2 × 640 kB of on-chip L1 SRAM per SHARC+ core, with parity protection and optional cache configuration. As detailed in the "L1 Memory" section (Page 7), this memory is tightly coupled, supports single-cycle access, and can be partitioned into DM/PM/cache blocks - up to 5 Mb total per core with flexible word-size addressing (8/16/32/48/64-bit).

Which digital audio interfaces are supported by the ADSP-21594KBPZ10, and how many?

The ADSP-21594KBPZ10 supports 2× DAI (Digital Audio Interfaces), each with 4 full SPORTs (totaling 8), 2× S/PDIF Rx/Tx, 8× ASRCs, 8× precision clock generators, and 2× 4-channel PDM microphone inputs. These are documented in Table 1 and the "PERIPHERALS" block diagram (Page 2), enabling complex multi-format audio routing without external interface ICs.