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Analog Devices Inc. ADSP-2173BS-80
- Part No.:
- ADSP-2173BS-80
- Manufacturer:
- Analog Devices Inc.
- Category:
- DSP (Digital Signal Processors)
- Package:
- 128-LQFP
- Datasheet:
-
ADSP-2173BS-80.pdf
- Description:
- 16-BIT DIGITAL SIGNAL PROCESSOR
- Quantity:
- Payment:
- Shipping:
Inventory:1,668
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Product details
Overview
ADSP-2173BS-80 from Analog Devices is a 3.3 V, 50 ns instruction-cycle (20 MIPS) fixed-point DSP microcomputer with dual serial ports, 8-bit/16-bit host interface port, 2K × 24-bit program RAM, 2K × 16-bit data RAM, and Bus Grant Hang Logic. It executes single-cycle instructions while concurrently handling serial I/O, timer decrement, and host transfers - deployed in portable audio codecs and real-time voice processing systems.
For engineers reviewing the ADSP-2173BS-80 datasheet, ADSP-2173BS-80 pinout, ADSP-2173BS-80 application, or ADSP-2173BS-80 equivalent, key selection criteria include 3.3 V operation, 128-pin TQFP package, powerdown mode (<0.36 mW standby), HIP configurability (8/16-bit), and SPORT0 multichannel TDM support - all confirmed for this exact variant.
Technical Context
The ADSP-2173BS-80 implements the ADSP-2100 base architecture with three independent computational units (ALU, MAC, shifter), two DAGs, and zero-overhead looping. Its instruction set adds bit manipulation (set/clear/toggle/test), x² multiply, biased rounding, and global interrupt masking - all executing in one 50 ns cycle at 3.3 V.
It supports asynchronous host interfacing via 16-pin multiplexed or separate-address HIP, dual double-buffered SPORTs with hardware A-law/μ-law companding, and programmable 16-bit timer with prescaler. Booting is configurable from byte-wide EPROM or via HIP, with automatic 7-wait-state generation on reset.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Instruction Cycle Time | 50 ns - enables 20 MIPS sustained throughput at 3.3 V with full parallel execution of address generation, data moves, and computation. |
| Supply Voltage | 3.3 V - defines core logic and I/O voltage domain; incompatible with 5.0 V operation per ADSP-2171/2172. |
| On-Chip Memory | 2K × 24-bit program RAM + 2K × 16-bit data RAM - provides self-contained code/data space without external memory for basic algorithms. |
| Power Dissipation (Active) | 70 mW typical - measured at 3.3 V, 50 ns cycle; enables battery-powered portable DSP applications. |
| Standby Power | 0.36 mW - CMOS powerdown current with 100-cycle recovery; lowest among ADSP-217x family (ADSP-2173-specific). |
| Host Interface | 8- or 16-bit configurable HIP - supports direct connection to Intel 80C51 or Motorola 68000 without glue logic. |
| Serial Ports | SPORT0 + SPORT1 - SPORT0 supports 24/32-word TDM; both offer hardware companding per G.711. |
Pinout & Package
ADSP-2173BS-80 is housed in a 128-lead TQFP (Thin Quad Flat Package) with 0.4 mm lead pitch, thermally enhanced for embedded signal processing applications requiring compact board area and reliable thermal performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CLKIN/XTAL | Clock input | Accepts 10 MHz crystal or TTL clock; internal oscillator enables low-jitter timing for audio sampling. |
| HSEL, HSIZE, BMODE, HMD0, HMD1 | HIP configuration inputs | Set 8/16-bit mode, boot source (EPROM vs. HIP), and address/data bus topology - define hardware interface before reset. |
| SPORT0 (TFS0, RFS0, DT0, DR0, SCLK0) | Serial port 0 interface | Supports frame-synchronized TDM streams up to 32 time slots; enables codec interfacing without external framing logic. |
| SPORT1 (TFS1/RFS1/DT1/DR1/SCLK1) | Serial port 1 or IRQ/flag interface | Configurable as second serial port or dual external interrupts (IRQ0/IRQ1) + flag I/O - increases system flexibility. |
| PWD / PWDACK | Powerdown control | PWD initiates ultra-low-power state; PWDACK confirms entry - critical for battery life optimization in portable devices. |
| FL2–FL0 | General-purpose flag outputs | Software-controllable status signals for event notification to external logic or LEDs - no GPIO expansion required. |
Key Features
| Feature | Design Value |
|---|---|
| Single-cycle instruction execution | Every instruction completes in one 50 ns cycle - enables deterministic real-time response for audio sample processing. |
| Dual independent data address generators (DAGs) | Each maintains four post-modified pointers with modulo addressing - accelerates circular buffer operations for FIR/IIR filters. |
| Hardware companding (A-law/μ-law) | Integrated in SPORT0/SPORT1 - eliminates need for external codec ICs in telephony-grade voice compression. |
| Bus Grant Hang Logic (BGH) | Prevents bus lockup during external DMA - ensures robust coexistence with host processors in shared-memory systems. |
| Programmable wait states | Configurable via software - allows seamless interfacing with slow EPROMs (e.g., 200 ns) without timing violations. |
Applications
| Voice Codec System | Portable Audio Player |
|---|---|
Use Scenario: Real-time G.711-compliant voice encoding/decoding in VoIP handsets with analog front-end. IC Role / Device Role / Timing Role: Primary DSP engine performing adaptive filtering, echo cancellation, and companded sample conversion. Use Value: On-chip SPORT companding and 0.36 mW powerdown reduce BOM cost and extend talk time beyond 8 hours on single-cell Li-ion. |
Use Scenario: MP3 decode and DAC output control in handheld music players with LCD UI and battery monitoring. IC Role / Device Role / Timing Role: Standalone audio processor managing file parsing, decompression, and stereo DAC interface via SPORT0. Use Value: 2K × 24-bit program RAM stores decoder firmware; 50 ns cycle time sustains 44.1 kHz playback with <10 µs latency. |
| Industrial Sensor Signal Processor | Medical ECG Front-End |
Use Scenario: Multi-channel vibration analysis in predictive maintenance modules using MEMS accelerometers. IC Role / Device Role / Timing Role: Real-time FFT and spectral feature extraction engine with SPI-connected ADCs. Use Value: Dual DAGs enable simultaneous acquisition and processing of 4-channel 10 kHz sampled data; HIP allows host MCU to update filter coefficients on-the-fly. |
Use Scenario: Low-noise, battery-operated ECG acquisition with real-time QRS detection and arrhythmia classification. IC Role / Device Role / Timing Role: Dedicated signal conditioner executing adaptive noise cancellation and beat detection algorithms. Use Value: 0.36 mW standby power extends device runtime to >72 hours; powerdown interrupt wakes processor on R-wave detection. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar fixed-point DSP microcomputer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADSP-2172BS-80 | 5.0 V supply; includes 8K × 24-bit on-chip ROM; no 0.36 mW powerdown mode. | Requires 5 V rail; suited for non-battery systems where ROM-based boot is preferred over HIP/EPROM loading. | Select only if 5 V operation and embedded ROM are mandatory; not drop-in compatible due to voltage and power characteristics. |
| TMS320C549PGE | 16-bit fixed-point DSP; 100 MIPS @ 100 MHz; different instruction set and memory map; no integrated HIP or companding. | Higher performance but requires external peripherals for voice codec functions; larger PCB footprint (144-pin LQFP). | Choose when raw MIPS and external memory scalability outweigh integrated features and low-power advantages of ADSP-2173BS-80. |
Compared with ADSP-2172BS-80 and TMS320C549PGE, the ADSP-2173BS-80 uniquely balances 3.3 V efficiency, hardware companding, and HIP integration - making it optimal for space-constrained, battery-powered voice/audio edge nodes where peripheral count and standby power are critical.
Availability
ADSP-2173BS-80 is available at Aetrix Electronics and suitable for voice codec systems, portable audio players, industrial sensor signal processors, and medical ECG front-ends requiring stable component supply across long-lifecycle embedded programs.
Supply support for ADSP-2173BS-80 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global semiconductor leader specializing in high-performance analog, mixed-signal, and digital signal processing technologies for precision instrumentation, communications, and industrial applications.
The ADSP-217x product line was engineered for cost-sensitive, low-power digital signal processing in portable and embedded systems - emphasizing integrated peripherals, deterministic real-time execution, and minimal external component count.
FAQ
What is the maximum operating frequency and instruction throughput of the ADSP-2173BS-80?
The ADSP-2173BS-80 operates at a 50 ns instruction cycle time, delivering 20 million instructions per second (MIPS) when powered at 3.3 V. This timing is guaranteed across commercial temperature range and reflects single-cycle execution of all instructions - including data moves, ALU operations, and MAC computations - as verified in the ADSP-217x datasheet Rev. A.
Does the ADSP-2173BS-80 support hardware-based A-law and μ-law companding?
Yes, the ADSP-2173BS-80 integrates hardware companding compliant with CCITT G.711 in both SPORT0 and SPORT1. This capability is confirmed in the "Features" section and functional block diagram of the ADSP-217x datasheet, enabling direct interface with telephony codecs without external companding ICs.
What is the standby power consumption of the ADSP-2173BS-80 in powerdown mode?
The ADSP-2173BS-80 achieves ≤0.36 mW typical CMOS standby power dissipation in powerdown mode with 100-cycle recovery, as explicitly stated in the "Features" table and "LOW POWER OPERATION" section of the ADSP-217x datasheet - a value specific to the ADSP-2173 variant.
Can the ADSP-2173BS-80 boot from external memory or only from internal RAM?
The ADSP-2173BS-80 supports automatic booting from byte-wide external memory (e.g., EPROM) or via the Host Interface Port (HIP), controlled by the BMODE pin. After reset, it generates seven wait states to accommodate slow boot devices like 200 ns EPROMs - a behavior documented in the "GENERAL DESCRIPTION" and "Boot circuitry" sections.
Is the ADSP-2173BS-80 pin-compatible with other ADSP-217x variants such as ADSP-2172BS-80?
No - while ADSP-2173BS-80 shares the same 128-pin TQFP package and pinout with ADSP-2171/2172, its 3.3 V supply requirement, absence of on-chip ROM, and distinct powerdown specification (0.36 mW vs. 0.55 mW) preclude direct substitution without board-level voltage and firmware changes.
ADSP-2173BS-80 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 128-LQFP
- Packaging:
- Bulk
- Product Status:
- Active
- Type:
- Fixed Point
- Interface:
- Host Interface, Serial Port
- Clock Rate:
- 20MHz
- Non-Volatile Memory:
- External
- On-Chip RAM:
- 10kB
- Voltage - I/O:
- 5.00V
- Voltage - Core:
- 5.00V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 128-TQFP (14x20)
ADSP-2173BS-80 FAQ
1.How can I place an order for ADSP-2173BS-80 through Aetrix?
Please submit a Request for Quotation (RFQ) for ADSP-2173BS-80 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADSP-2173BS-80 reliable?
The price and inventory of ADSP-2173BS-80 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADSP-2173BS-80 is usually 5 days.
3.What payment methods are accepted for ADSP-2173BS-80?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADSP-2173BS-80 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADSP-2173BS-80?
ADSP-2173BS-80 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADSP-2173BS-80 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADSP-2173BS-80?
For technical support, including ADSP-2173BS-80 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADSP-2173BS-80 requirements.
6.How does Aetrix verify that ADSP-2173BS-80 is sourced from the original manufacturer or authorized distributors?
All ADSP-2173BS-80 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADSP-2173BS-80 meets industry standards.
7.What is the process for return or replacement of ADSP-2173BS-80?
All ADSP-2173BS-80 units undergo pre-shipment inspection (PSI). If there is an issue with ADSP-2173BS-80, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADSP-2173BS-80 part is unused and in its original packaging.
Return procedure for ADSP-2173BS-80:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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