Analog Devices Inc. ADSP-2187LBST-160

Overview

ADSP-2187LBST-160 from Analog Devices is a 33 MIPS fixed-point DSP microcomputer with 16K × 24-bit on-chip program RAM, 16K × 16-bit on-chip data RAM, and dual 5-pin synchronous serial ports (SPORT0/SPORT1). It executes instructions in 30 ns cycles, supports zero-overhead looping, and integrates power-down mode with 100-cycle recovery-used in real-time audio processing, telecom channel banks, and industrial motor control systems.

For engineers reviewing the ADSP-2187LBST-160 datasheet, ADSP-2187LBST-160 pinout, ADSP-2187LBST-160 application, or ADSP-2187LBST-160 equivalent, key selection criteria include instruction cycle time, on-chip memory configuration, serial port framing flexibility, low-power operation modes, and ICE-Port™ emulator interface compatibility for in-system debugging.

Technical Context

The ADSP-2187LBST-160 implements the ADSP-2100 family base architecture with three independent computational units (ALU, MAC, shifter), two dedicated data address generators (DAG1/DAG2), and a zero-overhead program sequencer supporting conditional jumps and subroutine calls in one cycle. Its 3-bus architecture enables simultaneous dual operand fetches-one from program memory and one from data memory-within each instruction cycle.

It features two double-buffered serial ports with hardware companding (A-law/µ-law per CCITT G.711), programmable 16-bit interval timer with prescaler, 13 programmable flag pins (8 bidirectional, 3 output-only), and ICE-Port™ interface for full-speed in-circuit emulation without target board modification.

Key Specifications

Pinout & Package

ADSP-2187LBST-160 is housed in a 100-lead Thin Quad Flat Package (TQFP) with 0.5 mm pitch, thermally enhanced for sustained DSP workloads. Pin functions are multiplexed during reset (e.g., Mode A/B/C pins) or reconfigured in software (e.g., SPORT1 pins repurposed as IRQ0/IRQ1/Flag In/Flag Out).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar fixed-point DSP microcomputer applications.

Compared with ADSP-2187LBST-160, ADSP-2189MKSTZ-160 trades programmable boot flexibility for ROM-based cost reduction, while TMS320C549PGE offers higher peak performance but demands external signal interface components and lacks on-chip emulation support-making ADSP-2187LBST-160 optimal for new designs requiring rapid prototyping, low-latency audio I/O, and in-system debug capability.

Availability

ADSP-2187LBST-160 is available at Aetrix Electronics and suitable for voice channel processing, industrial motor control, medical ultrasound beamforming, and test & measurement signal analysis requiring stable component supply across extended production lifecycles.

Supply support for ADSP-2187LBST-160 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.

The ADSP-21xx family was engineered for real-time deterministic signal processing in resource-constrained embedded systems, emphasizing low-latency I/O, on-chip memory efficiency, and debug-ready silicon architecture.

FAQ

What clock source options does the ADSP-2187LBST-160 support?

The ADSP-2187LBST-160 accepts either an external TTL-compatible clock signal applied to CLKIN (at half the instruction rate, e.g., 16.67 MHz for 30 ns cycles) or a parallel-resonant crystal connected across CLKIN and XTAL pins. Crystal operation supports automatic oscillator start-up stabilization with configurable wait states, and the external clock may remain active during power-down mode without affecting recovery timing.

Does the ADSP-2187LBST-160 support in-system debugging without hardware modification?

Yes, the ADSP-2187LBST-160 integrates a 14-pin ICE-Port™ interface that enables full-speed, non-intrusive in-circuit emulation-including breakpoints, register inspection, memory read/write, and C-source-level debugging-without removing the device from the target board or adding trace headers. The EZ-ICE® emulator connects directly to this port for production-ready debug visibility.

How does the ADSP-2187LBST-160 handle serial audio data with A-law companding?

The ADSP-2187LBST-160 implements hardware A-law and µ-law companding per CCITT G.711 directly within its SPORT0 and SPORT1 modules. This offloads encoding/decoding from the CPU, allowing real-time 64 kbps PCM-to-logarithmic conversion with zero instruction overhead-critical for maintaining deterministic latency in VoIP and telephony gateway applications.

Can the ADSP-2187LBST-160 execute code from external memory?

Yes, the ADSP-2187LBST-160 supports automatic booting from byte-wide external memory (e.g., EPROM) via its Byte DMA port, and it can execute overlay code from up to 4 MByte of external byte memory. In Full Memory Mode, it uses A13:A0 and D23:D0 for external addressing; in Host Mode, it accesses external memory through the 16-bit IDMA port with limited addressability.

What low-power modes are available on the ADSP-2187LBST-160 and how do they differ?

The ADSP-2187LBST-160 offers three low-power modes: Power-Down (100-cycle wake-up, lowest current), Idle (indefinite wait until interrupt, clocks halted but DMA active), and Slow Idle (IDLE(n) instruction reduces internal clock by factor of 16/32/64/128). Each mode preserves on-chip RAM contents and supports interrupt-driven wake-up, making them suitable for battery-powered portable DSP applications.