Analog Devices Inc. ADSP-21990BBC

Overview

ADSP-21990BBC from Analog Devices is a mixed-signal DSP controller featuring a 16-bit fixed-point ADSP-2199x core delivering 160 MIPS sustained performance, integrated 8K words on-chip RAM (4K×24-bit program + 4K×16-bit data), an 8-channel 14-bit ADC with 20 MSPS sampling rate, and a 3-phase 16-bit center-aligned PWM unit with 12.5 ns resolution-designed for industrial motor control systems requiring tight real-time coordination of analog sensing and digital actuation.

For engineers reviewing the ADSP-21990BBC datasheet, ADSP-21990BBC pinout, ADSP-21990BBC application, or ADSP-21990BBC equivalent, key selection considerations include its 196-ball CSP_BGA package, 2.5 V core / 3.3 V I/O voltage compatibility, –40°C to +85°C operating range, IEEE JTAG 1149.1 debug support, and embedded peripherals including encoder interface, SPI, SPORT, and three 32-bit timers.

Technical Context

The ADSP-21990BBC implements a pipelined 16-bit fixed-point DSP architecture with dual DAGs, independent ALU/MAC/shifter units, two 40-bit accumulators, and zero-overhead looping-enabling parallel instruction fetch, dual operand access, computation, and address update in one 6.25 ns cycle at 160 MHz CCLK. Its unified 24-bit memory space supports up to 16M addresses across on-chip SRAM, boot ROM, and four configurable external memory banks.

Peripherals are tightly coupled via dedicated DMA channels: ADC, SPORT, and SPI each have dedicated DMA descriptors with priority arbitration (SPORT Rx highest, Memory DMA lowest); the 3-phase PWM unit operates synchronously with the 160 MHz core clock to achieve 12.5 ns timing resolution, while the encoder interface unit includes companion event timer and quadrature decoding logic for position feedback in closed-loop motion control.

Key Specifications

Pinout & Package

ADSP-21990BBC is housed in a 196-ball CSP_BGA package (ball pitch: 0.8 mm, body size: 12 mm × 12 mm) with power/ground ball optimization for low-noise analog and high-speed digital operation. Pin functions are defined per Analog Devices Rev. A datasheet Section "Pin Function Descriptions" (Pages 16–41), with dedicated analog supply (AVDD), reference (VREF), and ground (AGND) balls isolated from digital domains.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar mixed-signal DSP controller applications.

Compared with ADSP-21992BBC, ADSP-21990BBC provides full control over boot ROM content but requires custom bootloader implementation; compared with TMS320F28335PGFA, ADSP-21990BBC delivers superior analog integration and deterministic real-time latency at the cost of on-chip non-volatile storage.

Availability

ADSP-21990BBC is available at Aetrix Electronics and suitable for industrial motor drives, uninterruptible power supplies, optical networking control, and data acquisition systems requiring stable component supply, long-term lifecycle assurance, and traceable sourcing from authorized channels.

Supply support for ADSP-21990BBC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The ADSP-2199x product line was designed specifically for high-precision industrial motor control and real-time embedded signal processing-integrating DSP compute, high-resolution ADC, multi-phase PWM, and motion feedback interfaces into a single chip to eliminate external glue logic and reduce system latency.

FAQ

What is the maximum sampling rate supported by the ADC in ADSP-21990BBC?

The ADSP-21990BBC features an 8-channel, 14-bit analog-to-digital converter system capable of up to 20 MSPS sampling rate when operating at the maximum 160 MHz core clock (CCLK). This rate applies to single-channel operation; dual-channel simultaneous sampling across paired inputs (e.g., AD0/AD1) maintains full resolution with interleaved timing controlled by the ADC control module.

Does ADSP-21990BBC support JTAG-based debugging and emulation?

Yes, ADSP-21990BBC includes full IEEE JTAG Standard 1149.1 test access port support for on-chip emulation and system-level debugging. It enables real-time instruction trace, hardware breakpoint setting, register inspection, and memory read/write during active execution-compatible with Analog Devices' VisualDSP++ development environment and third-party ICE tools.

What are the power supply requirements for ADSP-21990BBC?

ADSP-21990BBC requires separate analog and digital supplies: AVDD and DVDD both at 2.5 V ±5%, with dedicated AGND and DGND planes. I/O pins operate at 3.3 V, supported by a separate 3.3 V supply (IOVDD). The device integrates a power-on-reset (POR) generator and supports flexible power-down/idle modes to reduce active current consumption below 5 mA in idle state.

Can ADSP-21990BBC generate center-aligned PWM waveforms with dead-time control?

Yes, ADSP-21990BBC includes a dedicated 3-phase, 16-bit center-aligned PWM generation unit that supports programmable dead-time insertion between complementary outputs (e.g., PWM0A/PWM0B). Dead-time values are configured via peripheral registers with resolution tied to the 160 MHz core clock, enabling precise control down to 12.5 ns steps for inverter gate drive safety.

Is the ADSP-21990BBC pin-compatible with other members of the ADSP-2199x family?

Yes, ADSP-21990BBC shares identical pinout and package (196-ball CSP_BGA) with ADSP-21992BBC and ADSP-21991BBC. All ADSP-2199x variants use the same mechanical footprint, power/ground ball mapping, and signal ball assignments-allowing drop-in replacement in PCB designs targeting different boot ROM configurations or peripheral enablement.