Analog Devices Inc. ADSP-SC587KBCZ-5B

Overview

ADSP-SC587KBCZ-5B from Analog Devices is a dual-core SHARC+ DSP with integrated Arm Cortex-A5 processor, delivering 500 MHz per SHARC+ core and 500 MHz Arm operation for real-time audio and industrial control systems. It integrates 5 Mb L1 SRAM per SHARC+ core (with parity), 256 kB L2 SRAM with ECC, dual 16-bit DDR3/DDR2/LPDDR1 interfaces, and hardware accelerators for FFT/IFFT, FIR/IIR, SINC filtering, and cryptographic operations. It is AEC-Q100 qualified and targets automotive infotainment and professional audio processing.

For engineers reviewing the ADSP-SC587KBCZ-5B datasheet, ADSP-SC587KBCZ-5B pinout, ADSP-SC587KBCZ-5B application, or ADSP-SC587KBCZ-5B equivalent, key selection considerations include dual-core floating-point throughput, on-chip memory partitioning, DDR interface count, CAN2.0 and USB 2.0 HS peripheral support, and automotive qualification status.

Technical Context

The ADSP-SC587KBCZ-5B implements a heterogeneous dual-processor architecture: two SHARC+ SIMD cores (each up to 500 MHz) with independent 5 Mb L1 SRAM banks and parity protection, plus an Arm Cortex-A5 core (500 MHz, 32 kB I-cache/32 kB D-cache, 256 kB L2 cache with parity). The system fabric interconnects both domains via L2 cache controller (PL310) and supports coherent data sharing.

It features two independent 16-bit L3 memory interfaces supporting DDR3L, DDR2, or LPDDR1 SDRAM, dual CAN2.0 controllers, three UARTs, two USB 2.0 HS PHYs (host/device), two EMACs (10/100/1000 + AVB + IEEE 1588), PCIe 2.0 (1 lane), and eight-channel 12-bit HADC - all synchronized through a centralized system event controller (SEC) and generic interrupt controller (GIC).

Key Specifications

Pinout & Package

ADSP-SC587KBCZ-5B uses a 529-ball CSP_BGA package (19 mm × 19 mm, 0.8 mm pitch, RoHS compliant), with ball assignments defined in Analog Devices' official documentation for the 529-Ball CSP_BGA configuration. Pin functions are multiplexed across GPIO Ports A–G and dedicated peripheral signals including DDR, USB, CAN, EMAC, PCIe, and HADC.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar heterogeneous DSP+Arm applications.

Compared with ADSP-SC587KBCZ-5B, ADSP-SC589KBCZ-5B adds PCIe and RTC at identical core performance, while ADSP-SC584KBCZ-4B reduces SHARC+ core count and DDR bandwidth - making ADSP-SC587KBCZ-5B the balanced choice for dual-core DSP + Arm applications requiring two DDR channels and automotive qualification.

Availability

ADSP-SC587KBCZ-5B is available at Aetrix Electronics and suitable for automotive infotainment, professional audio equipment, industrial motor control gateways, and medical ultrasound systems requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for ADSP-SC587KBCZ-5B includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and DSP technology, headquartered in Wilmington, MA, with deep expertise in precision signal processing and automotive-grade semiconductor design.

The ADSP-SC58x series was designed specifically for safety-critical, high-fidelity signal processing applications in automotive and professional audio markets - combining SHARC+ floating-point performance with Arm application-layer flexibility and AEC-Q100 qualification.

FAQ

What is the maximum operating frequency of each SHARC+ core in the ADSP-SC587KBCZ-5B?

The ADSP-SC587KBCZ-5B supports up to 500 MHz per SHARC+ core, confirmed in the official Analog Devices datasheet Rev. C, Table 2. This frequency enables real-time execution of complex floating-point algorithms such as 256-point FFTs in under 1 µs and multi-channel audio effects processing at sample rates up to 384 kHz. The ADSP-SC587KBCZ-5B maintains full instruction set compatibility with prior SHARC generations while adding branch prediction and cache enhancements.

Does the ADSP-SC587KBCZ-5B include hardware support for secure boot and cryptographic operations?

Yes, the ADSP-SC587KBCZ-5B integrates dedicated cryptographic hardware accelerators supporting AES-128/256, SHA-256, RSA, and TRNG, along with fast secure boot and Arm TrustZone security extensions. These features are documented in the "Security and Protection" section of the datasheet and enable authenticated firmware loading, encrypted OTA updates, and runtime isolation of sensitive code - critical for AEC-Q100 automotive compliance. The ADSP-SC587KBCZ-5B leverages these blocks to enforce IP protection without software overhead.

How many DDR memory interfaces does the ADSP-SC587KBCZ-5B support, and what standards are compatible?

The ADSP-SC587KBCZ-5B supports two independent 16-bit L3 memory interfaces, each capable of connecting to DDR3L (1.5 V), DDR2, or LPDDR1 SDRAM devices. This dual-interface capability is explicitly listed in Table 2 of the datasheet and allows concurrent high-bandwidth access to separate memory regions - for example, one DDR channel for audio buffer streaming and another for telemetry logging. The ADSP-SC587KBCZ-5B does not support DDR4 or LPDDR2/3/4.

Is the ADSP-SC587KBCZ-5B qualified for automotive applications, and what grade does it meet?

Yes, the ADSP-SC587KBCZ-5B is AEC-Q100 qualified for automotive applications and meets Grade 2 specifications (−40°C to +105°C ambient operating temperature). This qualification is stated in the "Additional Features" section and confirmed in Table 3 of the datasheet. The ADSP-SC587KBCZ-5B includes integrated thermal monitoring, memory ECC, and fault management units to satisfy ISO 26262 ASIL-B requirements for use in infotainment, ADAS domain controllers, and body electronics modules.

What peripheral interfaces are included for real-time audio I/O on the ADSP-SC587KBCZ-5B?

The ADSP-SC587KBCZ-5B includes two Digital Audio Interfaces (DAI), each with four full SPORTs, one S/PDIF Rx/Tx pair, four ASRC pairs, two precision clock generators (PCGs), and eight-channel 12-bit HADC. These are documented in Table 1 and Figure 1 of the datasheet. The ADSP-SC587KBCZ-5B supports up to 128-channel TDM audio over SPORTs and sample rate conversion between asynchronous sources - making it suitable for high-end digital mixers, broadcast equipment, and studio interfaces without external audio interface ICs.