Analog Devices Inc. ADTL084ARZ
- Part No.:
- ADTL084ARZ
- Manufacturer:
- Analog Devices Inc.
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
ADTL084ARZ.pdf
- Description:
- IC OPAMP JFET 4 CIRCUIT 14SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:341
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Product details
Overview
ADTL084ARZ from Analog Devices is a quad JFET-input operational amplifier optimized for precision analog signal conditioning in industrial and instrumentation systems. It delivers 5 MHz gain-bandwidth, 20 V/μs slew rate, 16 nV/√Hz voltage noise, ±15 V operation, and 80 dB minimum CMRR - enabling high-fidelity amplification in active filters, data acquisition front-ends, and sensor buffering applications.
For engineers reviewing the ADTL084ARZ datasheet, ADTL084ARZ pinout, ADTL084ARZ application, or ADTL084ARZ equivalent, this page provides verified package mapping (14-lead SOIC_N), temperature-grade validation (−40°C to +125°C), key electrical parameters, real-world use context, and two confirmed alternative parts with documented functional and application-level differences.
Technical Context
The ADTL084ARZ implements a quad-channel JFET-input architecture with rail-to-rail input common-mode range (−11 V to +15 V) and output swing up to ±13.5 V into 10 kΩ at ±15 V supply. Its 10 pA maximum input bias current and 5.5 mV maximum offset voltage (A grade) support high-impedance source interfacing without significant error contribution.
It features unity-gain stability, 120 dB channel separation at 10 kHz, and 0.001% THD at 1 kHz - confirming suitability for low-distortion signal paths in precision measurement and active filtering. The device meets JEDEC MS-012-AB mechanical standards for the R-14 package and operates across the extended industrial temperature range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain Bandwidth Product | 5 MHz - supports stable closed-loop gain ≥10 at 500 kHz, suitable for anti-aliasing and reconstruction filters. |
| Slew Rate | 20 V/μs - enables full-scale step response within 1 μs for ±10 V output, critical for fast-settling sample-and-hold circuits. |
| Input Bias Current | 10 pA max (25°C) - minimizes voltage error across high-value feedback networks (>1 MΩ) used in integrators and transimpedance amps. |
| Offset Voltage | 5.5 mV max (−40°C to +125°C) - ensures ≤0.055% gain error in 10 V full-scale instrumentation amplifiers without trimming. |
| CMRR | 80 dB min - rejects >100× common-mode interference in noisy industrial environments (e.g., motor drive feedback sensing). |
| Supply Current per Amp | 1.2 mA typical (±15 V) - allows four independent channels in <5 mA total, fitting low-power portable data loggers. |
| THD | 0.001% at 1 kHz - preserves signal fidelity in audio-grade and precision ADC driver stages. |
Pinout & Package
ADTL084ARZ is housed in a 14-lead SOIC_N (R-14) package per JEDEC MS-012-AB, with 1.27 mm lead pitch, 8.75 mm × 4.00 mm body size, and −40°C to +125°C operating temperature rating.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | OUT A | Inverting amplifier output channel A; drives loads ≥2 kΩ without instability. |
| 2 | –IN A | Inverting input of channel A; accepts differential signals with 10¹² Ω input impedance. |
| 3 | +IN A | Non-inverting input of channel A; supports common-mode voltages from −11 V to +15 V. |
| 4 | +V | Positive supply rail; must be established before input signals to prevent latch-up. |
| 5 | +IN B | Non-inverting input of channel B; electrically isolated from other channels with 120 dB separation. |
| 6 | –IN B | Inverting input of channel B; shares same bias current spec (≤10 pA) as all inputs. |
| 7 | OUT B | Output of channel B; capable of ±13.5 V swing into 10 kΩ at ±15 V supply. |
| 8 | OUT C | Output of channel C; identical AC/DC specs to OUT A and OUT B. |
| 9 | –IN C | Inverting input of channel C; validated for operation across full industrial temperature range. |
| 10 | +IN C | Non-inverting input of channel C; maintains 80 dB CMRR over −40°C to +125°C. |
| 11 | –V | Negative supply rail; requires simultaneous sequencing with +V per power sequencing guidelines. |
| 12 | +IN D | Non-inverting input of channel D; enables four independent gain stages on single IC. |
| 13 | –IN D | Inverting input of channel D; matches input capacitance (≈3 pF) and bias current of other inputs. |
| 14 | OUT D | Output of channel D; supports same dynamic performance (5 MHz GBW, 20 V/μs) as other channels. |
Key Features
| Feature | Design Value |
|---|---|
| TL08x-compatible pinout and footprint | Direct drop-in replacement for TL084 in existing SOIC-14 layouts without PCB revision. |
| Low input bias current (≤10 pA) | Enables accurate integration and high-Z sensor interfacing (e.g., piezoelectric, pH electrodes) without external guarding. |
| Extended industrial temperature range | Validated operation from −40°C to +125°C supports deployment in motor control enclosures and outdoor instrumentation. |
| Lead-free RoHS-compliant packaging | R-14 package meets IPC/JEDEC J-STD-020 moisture sensitivity level 3 (MSL3) and Pb-free reflow profiles. |
| High channel separation (120 dB @ 10 kHz) | Prevents crosstalk between simultaneously active channels in multi-signal data acquisition systems. |
Applications
| Industrial Process Monitoring | Multi-Channel Data Acquisition |
|---|---|
|
Use Scenario: Amplifying low-level 4–20 mA loop signals from pressure, flow, and temperature transmitters in PLC I/O modules. IC Role / Device Role / Timing Role: Quad op-amp configured as precision current-to-voltage converters and filter stages for each analog input channel. Use Value: 10 pA input bias current prevents gain error in 250 Ω shunt-based conversion; 5.5 mV max offset ensures ≤0.0275% full-scale error at 20 mA. |
Use Scenario: Front-end signal conditioning for 16-bit SAR ADCs sampling multiple sensors (thermocouples, strain gauges, accelerometers) simultaneously. IC Role / Device Role / Timing Role: Four independent programmable-gain amplifier (PGA) stages, each driving one ADC input with matched settling behavior. Use Value: 20 V/μs slew rate guarantees <1 μs settling to 16-bit accuracy after multiplexer switching; 120 dB channel separation avoids inter-channel interference. |
| Active Analog Filtering | Power Supply Feedback Control |
|
Use Scenario: Implementing 4th-order low-pass and band-pass filters in spectrum analyzers and vibration analysis equipment. IC Role / Device Role / Timing Role: Quad op-amp used in cascaded biquad sections with precise component matching enabled by consistent GBW and phase margin (63°). Use Value: 5 MHz GBW supports filter cutoff frequencies up to 100 kHz with <0.1 dB passband ripple; 0.001% THD preserves harmonic integrity. |
Use Scenario: Isolating and scaling feedback signals from isolated current/voltage sense transformers in switched-mode power supplies. IC Role / Device Role / Timing Role: High-common-mode-rejection amplifier stage rejecting 50/60 Hz noise and fast transient spikes on primary-side sensing lines. Use Value: 80 dB CMRR suppresses >100× common-mode noise from transformer leakage; ±15 V operation matches standard SMPS control IC rails. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad JFET-input op-amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TL084CDR | Higher 200 pA input bias current, 10 mV max offset, commercial temp range (0°C to 70°C), no lead-free option. | Limited to benign-environment bench instruments; unsuitable for unheated outdoor or motor-adjacent deployments. | Select only if cost is primary constraint and temperature/precision requirements are relaxed. |
| OPA4134UA | Lower 0.8 pA bias current, 0.5 mV offset, 8 MHz GBW, but higher 4.5 mA supply current and SOIC-14 footprint compatibility not guaranteed. | Better for ultra-high-Z sources (e.g., electrophysiology), but increased power limits battery-powered DAQ use. | Choose when sub-mV offset and sub-pA bias are mandatory, and thermal/power budget permits. |
Compared with TL084CDR, ADTL084ARZ offers 20× lower input bias and extended temperature capability; versus OPA4134UA, it trades 30% higher bias current for 60% lower quiescent power and guaranteed SOIC-14 pin compatibility - making ADTL084ARZ optimal for cost-sensitive, thermally demanding industrial signal chains.
Availability
ADTL084ARZ is available at Aetrix Electronics and suitable for industrial process monitoring, multi-channel data acquisition, active analog filtering, and power supply feedback control requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for ADTL084ARZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.
The ADTL084ARZ belongs to the ADTL08x family of JFET-input op-amps engineered to replace legacy TL08x devices with improved offset, drift, noise, and CMRR - specifically targeting industrial instrumentation, process control, and precision data conversion.
FAQ
What is the operating temperature range specified for ADTL084ARZ?
The ADTL084ARZ is rated for operation from −40°C to +125°C, meeting the extended industrial temperature grade. This specification is validated across all electrical parameters in Table 1 of the Rev. B datasheet, including offset voltage (5.5 mV max), input bias current (≤100 pA), and supply current (≤2.0 mA), ensuring reliability in harsh environments such as motor control cabinets and outdoor sensor nodes.
Is ADTL084ARZ pin-compatible with the TL084 series?
Yes, ADTL084ARZ uses the same 14-lead SOIC_N (R-14) package and identical pinout as TL084CDR and TL084ACDR, as confirmed in Figures 3 and 4 of the datasheet. This enables direct PCB-level replacement without layout changes, preserving existing trace routing, decoupling, and thermal design while upgrading performance in offset, noise, and temperature range.
What is the maximum output voltage swing for ADTL084ARZ at ±15 V supply?
At ±15 V supply and 25°C, ADTL084ARZ delivers ±13.5 V maximum peak output voltage into a 10 kΩ load, and ±13.3 V into a 2 kΩ load, as specified in Table 1 under "Maximum Output Voltage Swing." This 1.5 V headroom from rail enables robust signal handling in precision buffer and driver applications without clipping.
Does ADTL084ARZ require external compensation for unity-gain stability?
No, ADTL084ARZ is internally compensated for unity-gain stability, as explicitly stated in the FEATURES section and verified by 63° phase margin in Table 1. This eliminates the need for external capacitors or feedback network adjustments, simplifying design in inverting/non-inverting amplifier, voltage follower, and active filter configurations across its full 5 MHz bandwidth.
What packaging and compliance status does ADTL084ARZ have?
ADTL084ARZ is supplied in a RoHS-compliant, lead-free 14-lead SOIC_N (R-14) package, indicated by the "Z" suffix per the Ordering Guide. It meets JEDEC MS-012-AB mechanical standards, has MSL3 moisture sensitivity, and is qualified for reflow soldering per IPC/JEDEC J-STD-020 - supporting automated assembly in high-reliability industrial manufacturing.
ADTL084ARZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Amplifier Type:
- J-FET
- Number of Circuits:
- 4
- Output Type:
- -
- Slew Rate:
- 20V/µs
- Gain Bandwidth Product:
- 5 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 2 pA
- Voltage - Input Offset:
- 1.5 mV
- Current - Supply:
- 1.2mA (x4 Channels)
- Current - Output / Channel:
- 27 mA
- Voltage - Supply Span (Min):
- 8 V
- Voltage - Supply Span (Max):
- 36 V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SOIC
ADTL084ARZ FAQ
1.How can I place an order for ADTL084ARZ through Aetrix?
Please submit a Request for Quotation (RFQ) for ADTL084ARZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADTL084ARZ reliable?
The price and inventory of ADTL084ARZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADTL084ARZ is usually 5 days.
3.What payment methods are accepted for ADTL084ARZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADTL084ARZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADTL084ARZ?
ADTL084ARZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADTL084ARZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADTL084ARZ?
For technical support, including ADTL084ARZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADTL084ARZ requirements.
6.How does Aetrix verify that ADTL084ARZ is sourced from the original manufacturer or authorized distributors?
All ADTL084ARZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADTL084ARZ meets industry standards.
7.What is the process for return or replacement of ADTL084ARZ?
All ADTL084ARZ units undergo pre-shipment inspection (PSI). If there is an issue with ADTL084ARZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADTL084ARZ part is unused and in its original packaging.
Return procedure for ADTL084ARZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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