Analog Devices Inc. ADUM1241ARSZ
- Part No.:
- ADUM1241ARSZ
- Manufacturer:
- Analog Devices Inc.
- Category:
- Digital Isolators
- Package:
- 20-SSOP (0.209", 5.30mm Width)
- Datasheet:
-
ADUM1241ARSZ.pdf
- Description:
- DGTL ISO 3750VRMS 2CH GP 20SSOP
- Quantity:
- Payment:

- Shipping:

Inventory:209
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ADUM1241ARSZ from Analog Devices is a micropower, dual-channel digital isolator based on iCoupler® transformer technology, providing reinforced 3750 Vrms isolation in a 20-lead SSOP package. It supports bidirectional NRZ data rates up to 2 Mbps, operates from 2.25 V to 3.6 V supplies, and delivers ultralow quiescent current (5.6 μA/channel with refresh enabled, 0.3 μA/channel with refresh disabled at 3.3 V), enabling use in isolated SPI interfaces and 4 mA–20 mA loop controllers.
For engineers reviewing the ADUM1241ARSZ datasheet, ADUM1241ARSZ pinout, ADUM1241ARSZ application, or ADUM1241ARSZ equivalent, key selection criteria include its 20-lead SSOP package with EN1/EN2 control pins, 8 ns pulse width distortion, >25 kV/μs common-mode transient immunity, and support for asymmetric supply operation (e.g., VDD1 = 3.3 V / VDD2 = 2.5 V).
Technical Context
The ADUM1241ARSZ implements two independent, bidirectional CMOS-isolated signal channels using monolithic air-core transformers, with separate VDD1/GND1 and VDD2/GND2 domains. Its internal refresh enable/disable logic (via EN1/EN2 pins) allows dynamic trade-off between DC correctness and micropower operation - refresh enabled ensures guaranteed DC level retention; refresh disabled reduces current to sub-μA levels but requires periodic data transitions.
It features input hysteresis (ΔVT = 0.6 V at 3.3 V), undervoltage lockout (UVLO = 1.5 V), and an input glitch filter to suppress noise-induced false triggering. Propagation delay skew is tightly controlled at ≤10 ns (codirectional) and ≤15 ns (opposing direction), supporting timing-critical isolation in industrial PLC I/O modules and motor drive feedback paths.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Data Rate | 2 Mbps maximum NRZ - supports full-speed isolated SPI clock and data lines without oversampling. |
| Pulse Width Distortion | 8 ns max - ensures minimal duty cycle error in PWM or clock forwarding applications. |
| Common-Mode Transient Immunity | >25 kV/μs - maintains signal integrity in high-noise motor drive or power converter environments. |
| Quiescent Current (3.3 V, refresh enabled) | 5.6 μA per channel - enables battery-backed or energy-harvesting systems with multi-year runtime. |
| Isolation Rating | 3750 Vrms for 1 minute (UL 1577) - meets reinforced insulation requirements for industrial mains-connected equipment. |
| Propagation Delay Skew | 10 ns codirectional - guarantees matched timing across dual-channel isolated feedback signals. |
| Supply Voltage Range | 2.25 V to 3.6 V per side - supports mixed-voltage system interfacing (e.g., 3.3 V MCU to 2.5 V ADC). |
Pinout & Package
The ADUM1241ARSZ is housed in a 20-lead SSOP (RS-20) package with 0.65 mm lead pitch and 5.1 mm minimum PCB creepage/clearance. Pin 1 is VDD1; Pins 2 and 10 are internally connected GND1; Pins 11 and 19 are internally connected GND2; EN1 (Pin 7) and EN2 (Pin 14) control refresh mode; VIA/VIB (Pins 5/6) and VOA/VOB (Pins 16/15) are bidirectional data terminals; all NIC pins must remain unconnected.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1 (Pin 1) | Primary-side supply | 2.25–3.6 V input for Side 1 logic and isolation circuitry; requires local 0.01–0.1 μF ceramic bypass. |
| VIA (Pin 5), VIB (Pin 6) | Bidirectional input/output | Logic-level data terminals for Channel A and B; auto-direction sensing eliminates external control lines. |
| EN1 (Pin 7) | Refresh enable/disable control | GND = refresh enabled (guaranteed DC correctness); VDD1 = refresh disabled (0.3 μA/channel quiescent). |
| VOA (Pin 16), VOB (Pin 15) | Bidirectional input/output | Mirror terminals of VIA/VIB on secondary side; electrically isolated but functionally paired. |
| EN2 (Pin 14) | Refresh enable/disable control | Must match EN1 state; GND = refresh enabled; VDD2 = refresh disabled - both sides must operate identically. |
| GND1 (Pins 2, 10), GND2 (Pins 11, 19) | Isolated ground references | Separate ground domains prevent ground-loop currents; dual-pin connection improves return path impedance. |
Key Features
| Feature | Design Value |
|---|---|
| Ultralow-power refresh control | EN1/EN2 pins allow selectable 5.6 μA/channel (refresh on) or 0.3 μA/channel (refresh off) at 3.3 V - critical for always-on sensor nodes. |
| Asymmetric supply operation | Supports VDD1 = 3.3 V / VDD2 = 2.5 V or vice versa - enables direct interface between mixed-voltage subsystems without level shifters. |
| Input glitch filter | Hardware-based noise suppression on all data inputs - eliminates need for external RC filters or firmware debouncing in noisy industrial settings. |
| High-temperature operation | Rated from −40°C to +125°C ambient - suitable for under-hood automotive or enclosed industrial drive enclosures. |
| Reinforced insulation certification | UL 1577 (3750 Vrms), VDE V 0884-10 (VIORM = 849 Vpeak) - satisfies safety requirements for functional isolation in Class I equipment. |
Applications
| Industrial PLC Digital I/O Modules | Isolated SPI Interface for Precision ADCs |
|---|---|
Use Scenario: Isolating 24 V DC digital input cards from 3.3 V controller logic in programmable logic controllers. IC Role / Device Role / Timing Role: Dual-channel signal isolator providing galvanic separation between field-side sensors and backplane logic, with EN1/EN2 configured for low-power standby during idle cycles. Use Value: Eliminates ground loops and protects controller from transients while maintaining <8 ns pulse width distortion for accurate edge detection on fast input signals. | Use Scenario: Isolating SPI clock, MOSI, MISO, and CS lines between a microcontroller and a 24-bit precision ADC in a high-voltage measurement system. IC Role / Device Role / Timing Role: Bidirectional digital isolator preserving SPI timing integrity across isolation barrier; propagation delay skew ≤10 ns ensures setup/hold margin compliance at 10 MHz SCLK. Use Value: Enables safe, high-resolution analog acquisition in CAT III 600 V environments without compromising data rate or introducing jitter-induced quantization error. |
| 4–20 mA Loop-Powered Transmitter | Motor Drive Gate Driver Feedback |
Use Scenario: Isolating digital configuration and status signals between a loop-powered 4–20 mA transmitter IC and its host controller. IC Role / Device Role / Timing Role: Micropower dual isolator operating from 3.3 V supply with EN1/EN2 tied to VDD1 - draws only 0.6 μA total to extend loop lifetime. Use Value: Maintains full 2 Mbps capability while consuming <1 μW per channel - preserves available loop power budget for sensor excitation and signal conditioning. | Use Scenario: Isolating fault reporting and ready-status signals from IGBT gate driver ICs to MCU in variable-frequency drives. IC Role / Device Role / Timing Role: High-CMTI (>25 kV/μs) dual isolator conveying desaturation fault pulses and gate driver ready flags across 1200 V DC bus barriers. Use Value: Prevents false fault triggering during high dv/dt switching events, ensuring reliable protection response within <200 ns of overcurrent detection. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SI8621ED-IS | Capacitive isolation; 5000 Vrms rating; 150 kV/μs CMTI; no refresh disable mode - fixed 5.5 μA/channel quiescent current. | Higher CMTI suits ultra-fast SiC gate drivers; lacks micropower mode - unsuitable for battery-powered transmitters. | Select SI8621ED-IS when CMTI >40 kV/μs is mandatory and supply current is secondary to noise immunity. |
| ISO7721DWR | Capacitive isolation; 5000 Vrms; 100 kV/μs CMTI; supports 1.8–5.5 V supplies; no EN pin - always active refresh. | Wider voltage range simplifies design with mixed-supply SoCs; higher quiescent current (6.5 μA/channel) limits energy-constrained use cases. | Choose ISO7721DWR for designs requiring 1.8 V compatibility or where layout space favors SOIC-8 over SSOP-20. |
Compared with SI8621ED-IS and ISO7721DWR, the ADUM1241ARSZ uniquely combines SSOP-20 package with dedicated EN1/EN2 pins for sub-μA micropower operation, making it the only option among the three qualified for 125°C operation with guaranteed refresh-disable functionality and UL/VDE reinforced certification at 3750 Vrms.
Availability
ADUM1241ARSZ is available at Aetrix Electronics and suitable for industrial PLC I/O modules, isolated SPI interfaces, 4–20 mA loop transmitters, and motor drive feedback systems requiring stable component supply, long-term lifecycle assurance, and certified reinforced isolation.
Supply support for ADUM1241ARSZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global semiconductor company specializing in high-performance analog, mixed-signal, and digital signal processing technologies for precision instrumentation, industrial automation, and communications infrastructure.
The ADUM1241ARSZ belongs to the iCoupler® digital isolator product line, designed specifically to replace optocouplers with superior speed, reliability, and power efficiency in safety-critical industrial and automotive isolation applications.
FAQ
What is the isolation voltage rating of the ADUM1241ARSZ?
The ADUM1241ARSZ is rated for 3750 Vrms for 1 minute per UL 1577 and has a maximum working insulation voltage (VIORM) of 849 Vpeak per DIN V VDE V 0884-10, qualifying it for reinforced insulation in industrial equipment. This rating applies specifically to the 20-lead SSOP package variant; the 8-lead SOIC version is rated at 3000 Vrms. The ADUM1241ARSZ achieves this via monolithic air-core transformer construction and certified package creepage/clearance.
How does the EN1 and EN2 pin functionality affect power consumption in the ADUM1241ARSZ?
When EN1 and EN2 are tied to GND1/GND2, the ADUM1241ARSZ operates in standard mode with refresh enabled, drawing 5.6 μA per channel at 3.3 V. When both are tied to VDD1/VDD2, refresh is disabled, reducing quiescent current to 0.3 μA per channel - a 18× reduction. This mode requires periodic data transitions to maintain DC correctness; the ADUM1241ARSZ will not retain static logic levels indefinitely in refresh-disabled mode.
Can the ADUM1241ARSZ operate with different supply voltages on each side?
Yes, the ADUM1241ARSZ supports asymmetric supply operation: VDD1 and VDD2 may be independently set between 2.25 V and 3.6 V. Electrical characteristics are specified for VDD1 = 3.3 V / VDD2 = 2.5 V and VDD1 = 2.5 V / VDD2 = 3.3 V configurations, including propagation delay, PWD, and supply current. This enables direct interfacing between 3.3 V microcontrollers and 2.5 V ADCs or DACs without external level shifters.
What is the maximum data rate supported by the ADUM1241ARSZ, and what limits it?
The ADUM1241ARSZ supports a maximum data rate of 2 Mbps in nonreturn-to-zero (NRZ) format. This limit is defined by pulse width distortion (PWD ≤ 8 ns), which ensures that duty cycle integrity is maintained across the isolation barrier. At higher rates, PWD increases, risking intersymbol interference and bit errors - the 2 Mbps specification guarantees reliable operation within the PWD limit across the full temperature and voltage range.
Does the ADUM1241ARSZ require external components for basic operation?
Yes, the ADUM1241ARSZ requires ceramic bypass capacitors (0.01 μF to 0.1 μF) between VDD1 and GND1, and between VDD2 and GND2, placed as close as possible to the respective pins. No pull-up/pull-down resistors or external level shifters are needed - its bidirectional logic automatically senses data direction. The EN1 and EN2 pins must be actively driven to GND or VDDx; floating these pins is not permitted and may cause undefined behavior in the ADUM1241ARSZ.
ADUM1241ARSZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- iCoupler®
- Package/Case:
- 20-SSOP (0.209", 5.30mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Technology:
- Magnetic Coupling
- Type:
- General Purpose
- Isolated Power:
- No
- Number of Channels:
- 2
- Inputs - Side 1/Side 2:
- 1/1
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- 3750Vrms
- Common Mode Transient Immunity (Min):
- 25kV/µs
- Data Rate:
- 2Mbps
- Propagation Delay tpLH / tpHL (Max):
- 180ns, 180ns
- Pulse Width Distortion (Max):
- 8ns
- Rise / Fall Time (Typ):
- 2ns, 2ns
- Voltage - Supply:
- 2.25V ~ 3.6V
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-SSOP
ADUM1241ARSZ FAQ
1.How can I place an order for ADUM1241ARSZ through Aetrix?
Please submit a Request for Quotation (RFQ) for ADUM1241ARSZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADUM1241ARSZ reliable?
The price and inventory of ADUM1241ARSZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADUM1241ARSZ is usually 5 days.
3.What payment methods are accepted for ADUM1241ARSZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADUM1241ARSZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADUM1241ARSZ?
ADUM1241ARSZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADUM1241ARSZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADUM1241ARSZ?
For technical support, including ADUM1241ARSZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADUM1241ARSZ requirements.
6.How does Aetrix verify that ADUM1241ARSZ is sourced from the original manufacturer or authorized distributors?
All ADUM1241ARSZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADUM1241ARSZ meets industry standards.
7.What is the process for return or replacement of ADUM1241ARSZ?
All ADUM1241ARSZ units undergo pre-shipment inspection (PSI). If there is an issue with ADUM1241ARSZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADUM1241ARSZ part is unused and in its original packaging.
Return procedure for ADUM1241ARSZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ADUM1241ARSZ Tags
-
ISO1212DBQR
Texas Instruments

-
ISO6721BDR
Texas Instruments

-
SI8710AC-B-ISR
Skyworks Solutions Inc.

-
ISO7720FDR
Texas Instruments

-
ISO7721DR
Texas Instruments

-
ISO7721FDR
Texas Instruments

-
SI8710CC-B-ISR
Skyworks Solutions Inc.

-
ISO6741FQDWRQ1
Texas Instruments

-
ISO7721DWVR
Texas Instruments
-
ISO7762FDBQR
Texas Instruments

-
ISO7741DWR
Texas Instruments

-
ISO7741FDWR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
